參數(shù)資料
型號(hào): BH16652DGG
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: 16-bit transceiver/register, non-inverting 3-State
中文描述: ABT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封裝: PLASTIC, TSSOP2-56
文件頁數(shù): 9/12頁
文件大小: 96K
代理商: BH16652DGG
Philips Semiconductors
Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
1998 Feb 27
9
AC WAVEFORMS (Continued)
V
M
= 1.5V, V
IN
= GND to 3.0V
V
M
t
PHL
t
PLH
V
M
V
M
V
M
nSBA or
nSAB
nAx or nBx
SH00032
3.0V or V
CC
0V
V
OH
V
OL
Waveform 3. Propagation Delay, SBA to nAx or SAB to nBx
ééé
ééé
ééé
s
éééééééé
éééééééé
éééééééé
t
h
(H)
t
s
(L)
t
h
(L)
V
nAx or
nBx
V
M
V
M
V
V
V
nCPBA or
nCPAB
SH00049
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
t
W
(L)
3.0V
or
V
CC
0V
3.0V
or
V
CC
0V
Waveform 4. Data Setup and Hold Times
V
Y
V
M
V
M
V
M
nAx or nBx
t
PZH
t
PHZ
SH00050
nOEBA
0V
nOEAB
V
OH
3.0V or V
CC
whichever
is less
0V
Waveform 5. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
V
X
V
OL
V
M
V
M
V
M
nAx or
nBx
t
PZL
t
PLZ
SH00051
nOEBA
nOEAB
3.0V
or
V
CC
0V
3.0V
or
V
CC
0V
Waveform 6. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORMS
t
W
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
NEGATIVE
PULSE
POSITIVE
PULSE
t
W
AMP (V)
0V
0V
t
THL (
t
f
)
INPUT PULSE REQUIREMENTS
Rep. Rate
t
w
t
R
t
F
1MHz
500ns
2.5ns
2.5ns
V
= 1.5V
Input Pulse Definition
V
CC
FAMILY
74ABT16
D.U.T.
PULSE
GENERATOR
R
L
C
L
R
T
V
IN
V
OUT
Test Circuit for 3-State Outputs
DEFINITIONS:
R
L
=
C
L
=
Load resistor; see AC CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
Termination resistance should be equal to Z
OUT
of
pulse generators.
R
T
=
t
THL (
t
f
)
t
TLH (
t
r
)
t
TLH (
t
r
)
AMP (V)
Amplitude
3.0V
R
L
7.0V
SH00022
TEST
t
PLZ
t
PZL
All other
SWITCH
closed
closed
open
SWITCH POSITION
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