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參數(shù)資料
| 型號： | BH16273DL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | 16-bit D-type flip-flop |
| 中文描述： | ABT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 85K |
| 代理商： | BH16273DL |
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
1998 Feb 27
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = +25
°
C
Temp = -40
°
C
to +85
°
C
UNIT
MIN
TYP
MAX
MIN
MAX
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= –18mA
0.9
–1.2
–1.2
V
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
2.5
2.9
2.5
V
OH
High-level output voltage
V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
3.0
3.4
3.0
V
V
CC
= 4.5V; I
OH
= –32mA; V
IL
or V
IH
2.0
2.4
2.0
V
OL
Low-level output voltage
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
0.42
0.55
0.55
V
RST
Power-up output
voltage
3
V
CC
= 5.5V; I
O
= 1mA; V
I
= GND or V
CC
0.13
0.55
0.55
V
Input leakag
74ABT16273
I
V
= 5 5V; V = V
I
= V
or GND
CC
0 1
±
0.1
1
±
1
±
A
μ
I
CC
Input leakage current
In ut leakage current
74ABTH16273
V
CC
= 5.5V; V
I
= V
CC
or GND
Control
pins
±
0.01
±
1
±
1
μ
A
I
I
V
CC
= 5.5V; V
I
= V
CC
Data pins
0.01
1
1
μ
A
V
CC
= 5.5V; V
I
= 0
–2
–3
–5
μ
A
Bus H ld
74ABTH16273
t i
t
4
V
CC
= 4.5V; V
I
= 0.8V
35
35
I
HOLD
V
CC
= 4.5V; V
I
= 2.0V
V
CC
= 5.5V; V
I
= 0 to 5.5V
–75
±
800
–75
μ
A
I
OFF
Power-off leakage
current
V
CC
= 0.0V; V
O
or V
I
4.5V
±
5.0
±
100
±
100
μ
A
I
O
output current
1
V
CC
= 5.5V; V
O
= 2.5V
–50
–70
–180
–50
–180
mA
CEX
Output High leakage
current
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
5.0
50
50
μ
A
I
CCH
Quiescent supply current
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
0.2
1
1
mA
I
CCL
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
8
19
19
I
CC
Additional supply current
per input pin
2
74ABT16273
V
CC
= 5.5V; One input at 3.4V.
Other inputs at V
CC
or GND
5
100
100
μ
A
I
CC
Additional supply current
per input pin
2
74ABTH16273
V
CC
= 5.5V; One input at 3.4V.
Other inputs at V
CC
or GND
0.2
1
1
mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This is the bus hold overdrive current required to force the input to the opposite logic state.
AC CHARACTERISTICS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF; R
L
= 500
;
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= +25
°
C
V
CC
= +5.0V
TYP
2.5
2.0
T
amb
= –40 to +85
°
C
V
CC
= +5.0V
±
0.5V
MIN
1.5
1.2
UNIT
MIN
1.5
1.2
MAX
3.4
2.7
MAX
4.0
3.0
t
PLH
t
PHL
Propagation delay
nCP to nQx
Propagation delay
nMR to nQx
Maximum clock frequency
1
ns
t
PHL
2
1.9
3.7
4.3
1.9
5.3
ns
f
MAX
1
150
240
150
MHz
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