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參數(shù)資料
| 型號： | BH162245ADL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | 16-Bit bus transceiver with 30ohm series termination resistors 3-State |
| 中文描述： | ABT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | 7.50 MM, PLASTIC, SOT-370-1, SSOP3-48 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 83K |
| 代理商： | BH162245ADL |
Philips Semiconductors
16-bit bus transceiver with 30
series
termination resistors (3-State)
Product specification
74ABT162245A
74ABTH162245A
1998 Feb 25
6
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25
°
C
T
amb
= –40
°
C
to +85
°
C
UNIT
Min
Typ
Max
Min
Max
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= –18mA
–0.9
–1.2
–1.2
V
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
2.5
2.9
2.5
V
V
OH
High-level output voltage
V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
3.0
3.4
3.0
V
V
CC
= 4.5V; I
OH
= –32mA; V
I
= V
IL
or V
IH
2.0
2.4
2.0
V
V
OL
Low-level output voltage
V
CC
= 4.5V; I
OL
= 8mA; V
I
= V
IL
or V
IH
0.46
0.65
0.65
V
Low-level output voltage
V
CC
= 4.5V; I
OL
= 12mA; V
I
= V
IL
or V
IH
0.50
0.80
0.80
V
I
I
Input leakage current
V
CC
= 5.5V; V
I
= GND or 5.5V
Control
pins
±
0.01
±
1.0
±
1.0
μ
A
Bus hold current
A and B inputs
4
74ABTH162245A
V
CC
= 4.5V; V
I
= 0.8V
50
50
I
HOLD
V
CC
= 5.5V; V
I
= 2.0V
V
CC
= 5.5V; V
I
= 0 to 5.5V
V
CC
= 0.0V; V
O
or V
I
≤
4.5V
–75
–75
μ
A
±
500
I
OFF
Power-off leakage current
±
5.0
±
100
±
100
μ
A
I
PU
/I
PD
Power-up/down 3-State
output current
3
V
CC
= 2.0V; V
= 0.5V; V
I
= GND or V
CC;
V
OE
= Don’t care
±
5.0
±
50
±
50
μ
A
I
IH
+I
OZH
3-State output High current
V
CC
= 5.5V; V
O
= 5.5V; V
I
= V
IL
or V
IH
0.5
10
10
μ
A
I
IL
+I
OZL
3-State output Low current
V
CC
= 5.5V; V
O
= 0.0V; V
I
= V
IL
or V
IH
–0.5
–10
–10
μ
A
I
CEX
Output high leakage current
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
5.0
50
50
μ
A
I
O
Output current
1
V
CC
= 5.5V; V
O
= 2.5V
–50
–92
–180
–50
–180
mA
I
CCH
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
0.3
0.70
0.70
mA
I
CCL
Quiescent supply current
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
10
19
19
mA
I
CCZ
V
CC
= 5.5V; Outputs 3-State;
V
I
CC
0.3
0.70
0.70
mA
Outputs enabled, one data input at 3.4V,
other inputs at V
CC
or GND; V
CC
= 5.5V
400
700
700
μ
A
Additional supply current per
input pin
2
Outputs 3-State, one data input at 3.4V, other
inputs at V
CC
or GND; V
CC
= 5.5V
74ABT162245A
1.0
50
50
μ
A
I
CC
Outputs 3-State, one data input at 3.4V, other
inputs at V
CC
or GND; V
CC
= 5.5V
74ABTH162245A
100
250
250
μ
A
Control pins, outputs disabled, one enable
input at 3.4V, other inputs at V
CC
or GND;
V
CC
= 5.5V
400
700
700
μ
A
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. This parameter is valid for any V
CC
between 0V and 2.1V, with a transition time of up to 10msec. From V
CC
= 2.1V to V
CC
= 5
±
10% a
transition time of up to 100
μ
sec is permitted.
4. This is the bus hold overdrive current required to force the input to the opposite logic state.
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