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參數(shù)資料
| 型號： | BD6637KV-E2 |
| 元件分類： | 運動控制電子 |
| 英文描述： | DISK DRIVE MOTOR CONTROLLER, 1 A, PQFP64 |
| 封裝： | ROHS COMPLIANT, VQFP-64 |
| 文件頁數(shù)： | 6/17頁 |
| 文件大?。?/td> | 763K |
| 代理商： | BD6637KV-E2 |
14/16
4) Cylinder and output current slope setting capacitor (CSL1, CSL2)
Triangle wave is output from D.SL terminal 1 and 2 for normal rotation of the cylinder. Level 1 is output for Low-
level of the triangle wave. The level determined by cylinder rotating speed is output for High-level. Adjust the
capacitor of terminal D.SL1 and D.SL2 and the resistance of ISET terminal so that this High-level is approximately
1.8V.
It can be set as follows:
Example: When normal rotation speed of cylinder is 9000 rpm, capacitor of terminal D.SL1 and D.SL2 0.047 F and
resistance 18 k are recommended.
5) Setting of drive signal frequency in cylinder startup
Drive signal frequency in cylinder startup can be controlled by changing the capacitor of D.DETECT terminal.
Adjust the optimum value, so that starting time is shortest on your motor.
Drive signal frequency during startup
can be calculated as follows: Optimum value depends on motor, while 0.1 - 0.2
F is recommended.
DETECT terminal H voltage
: 1.3V (Typ. value)
DETECT terminal L
: 0.65V (Typ. value)
DETECT terminal charging and discharging current
: 5 A (Typ. value)
6) PCI/PCV terminal connecting capacitor (capstan/cylinder)
Capacitor connected to PCI and PCV terminal is used to compensate the phase of upper and lower saturation
prevention circuit and current feedback loop. When it is too large, the entire loop (including servo system), becomes
unstable.
When it is too small, the output waveform oscillates. Recommended are 100pF for PCI terminal, 0.1
F
for PCV terminal of cylinder, 0.1
F for PCI terminal and 0.1
F for PCV terminal of capstan.
7) DC/DC (capstan/cylinder)
When the output of VS terminal of capstan/cylinder is connected to the DC/DC converter, the motor voltage can be
controlled according to the output voltage waveform of the motor.
When the DC/DC converter gain is low, the
maximum VM voltage cannot be output. The output current waveform is distorted, therefore adjust to an optimum
value.
8) RNF terminal
Connect a small resistor (0.33 to 0.5 ) between RNF terminal and GND for detecting output current.
Because
High current flows in this resistor, take precautious against high resistor wattage. The value of the torque command
gain versus this resistor (0.33 ), is described in the electrical characteristics. Note that this value also changes
when resistance changes.
9) Voltage rising circuit
This IC applies Nch DMOS on output stage, and incorporates a voltage boost current for the corresponding gate
voltage. When the capacitance value between CP1 terminal and CP2 terminal is low, the current capability of VG
terminal voltage is low.
When the capacitance value between VG terminal and GND terminal is low, the ripple of
VG voltage becomes high.
Recommended capacitance value between terminal CP1 and CP2 is 0.1 to 0.22
F
and that between terminal VG and GND is 1 to 10
F.
Thermal derating characteristics
BD6637KV/KS
BD6300KU
* 70 mm x 70 mm x 1.6 mm glass epoxy board mounted
CSL1,CSL2
185 s
ISL
0.8V
(F)
(where ISL
ISET terminal voltage
Typ.:0.4V
RISET
(DETECT terminal H voltage
DETECT terminal L voltage)
CDETECT 6
DETECT terminal charging and discharging current
(Hz)
Reduce by 10m W/°C when Ta = 25 °C
Reduce by 14m W/°C when Ta = 25 °C
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