參數(shù)資料
型號(hào)： B900J24PXX16T
元件分類： 數(shù)字信號(hào)處理
英文描述： 0-BIT, 59.88 MHz, OTHER DSP, PQFP44
文件頁數(shù)： 42/100頁
文件大小： 1547K
代理商： B900J24PXX16T
46
Lucent Technologies Inc.
B900
Advance Data Sheet
Baseband Signal Processor
July 1999
5 Software Architecture (continued)
5.1
Instruction Set (continued)
5.1.6 F4 BMU Instructions (continued)
s
Bit-Field Extraction and Insertion
Note: The bit field to be inserted or extracted is specified as follows: the width (in bits) of the field is the upper byte
of the operand (immediate or arM), and the offset from the LSB is in the lower byte.
s
Alternate Accumulator Set
Note: The alternate accumulator gets what was in aS. aD gets what was in the alternate accumulator.
aD = extracts(aS, IM16) Extraction with sign extension, field specified as immediate; 2-cycle, 2-word.
aD = extracts(aS, arM)
Extraction with sign extension, field specified in arM; 1-cycle.
aD = extractz(aS, IM16) Extraction with zero extension, field specified as immediate; 2-cycle, 2-word.
aD = extractz(aS, arM)
Extraction with zero extension, field specified in arM; 1-cycle.
aD = insert(aS, IM16)
Bit-field insertion, field specified as immediate; 2-cycle, 2-word.
aD = insert(aS, arM)
Bit-field insertion, field specified in arM; 2-cycle.
aD = aS:aa0
Shuffle accumulators with alternate accumulator 0 (aa0); 1-cycle.
aD = aS:aa1
Shuffle accumulators with alternate accumulator 1 (aa1); 1-cycle.
Table 31. Replacement Table for F4 BMU Instructions
Replace
Value
Meaning
aD, aT, aS
a0 or a1
One of the two accumulators.
IM16
immediate
16-bit data, sign-, zero-, or one-extended as appropriate.
arM
ar<0—3>
One of the auxiliary BMU registers.
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