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參數(shù)資料
| 型號： | B5S16861TTR |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 20-BIT TWO PORT BUS SWITCH |
| 中文描述： | 20位雙端口總線開關(guān) |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 189K |
| 代理商： | B5S16861TTR |
1/10
October 2004
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HIGH SPEED: t
PD
= 0.25ns (MAX.)
at V
CC
= 4.5V T
A
=85°C
I
ON RESISTANCE BETWEEN TWO PORT:
5
(TYP) at V
CC
= 5.0V T
A
=25°C
LOW POWER DISSIPATION:
I
CC
= 1uA(MAX.) at T
A
=25°C
COMPATIBLE WITH TTL OUTPUTS:
V
IH
=2V(MIN), V
IL
=0.8V(MAX)
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16861
IMPROVED LATCH-UP IMMUNITY
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
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DESCRIPTION
The B5S16861 is an advanced high-speed CMOS
20-BIT TWO PORT BUS SWITCH fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
It is ideal for 4V to 5.5V V
CC
operations and
ultra-low power and low noise applications,
typically notebook and docking station.
Any nG output control governs two 10-bit BUS
SWITCHES. Output Enable inputs (nG) tied
together gives full 20-bit operations. When nG is
LOW, the switches are on. When nG is HIGH, the
switches are in high impedance state.
It has ultra high-speed performance at 5V near
zero delay with low ON resistance.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
B5S16861
20-BIT TWO PORT BUS SWITCH
This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice.
Table 1: Order Codes
PACKAGE
T & R
TSSOP48
B5S16861TTR
TSSOP
PRELIMINARY DATA
Figure 1: Pin Connection
Rev. 1
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