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參數(shù)資料
| 型號(hào)： | B300W35A102XYG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 12/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PROCESSOR AUDIO 24BIT 35WLCSP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | BelaSigna® 300 |
| 類型： | 音頻處理器 |
| 應(yīng)用： | 便攜式設(shè)備 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 35-VFBGA，WLCSP |
| 供應(yīng)商設(shè)備封裝： | 35-WLCSP（3.63x2.68） |
| 包裝： | 帶卷 (TR) |
BelaSigna 300
http://onsemi.com
6
Table 2. ELECTRICAL SPECIFICATIONS (continued)
Description
Screened
Units
Max
Typ
Min
Conditions
Symbol
OSCILLATION CIRCUITRY
Internal oscillator frequency
SYS_CLK
0.5
10.24
MHz
√
Calibrated internal clock
frequency
SYS_CLK
1
±0
+1
%
√
Internal oscillator jitter
System clock: 1.28 MHz
0.4
1
ns
External oscillator tolerances
EXT_CLK
Duty cycle
45
50
55
%
System clock: 30 MHz
300
ps
Maximum working frequency
CLKMAX
External clock; VBAT: 1.8 V
40
MHz
√
DIGITAL INTERFACES
I2C baud rate
System clock < 1.6 MHz
100
kbps
System clock > 1.6 MHz
400
kbps
Generalpurpose UART
baud rate
System clock ≥ 5.12 MHz
1
Mbps
4. DFN Package option can have higher inputreferred noise up to 2 mV worse than the WLCSP. WLCSP specifications listed.
5. CDM only applies to the DFN package.
Environmental Characteristics
All BelaSigna 300 packages are Pbfree, RoHScompliant and Green.
BelaSigna 300 parts are qualified against standards outlined in the following sections.
All BelaSigna 300 package options are Green (RoHScompliant). Contact ON Semiconductor for supporting documentation.
WLCSP Package Option
The solder ball composition for the WLCSP package is
SAC266.
Table 3. WLCSP PACKAGELEVEL QUALIFICATION
Packaging Level
Moisture sensitivity level
JEDEC Level 1
Thermal cycling test (TCT)
55°C to 150°C for 500 cycles
Highly accelerated stress
test (HAST)
85°C / 85% RH for 1000 hours
High temperature stress
test (HTST)
150°C for 1000 hours
Table 4. WLCSP BOARDLEVEL QUALIFICATION
Board Level
Temperature
40°C to 125°C for 2500
cycles with no failures
DFN Package Option
The DFN package has been qualified against AECQ100.
Contact ON Semiconductor for full details.
Table 5. DFN PACKAGELEVEL QUALIFICATION
Packaging Level
Moisture sensitivity level
JEDEC Level 3
30°C / 60% RH for 192 hours
Thermal cycling test (TCT)
65°C to 150°C for 500 cycles
Highly accelerated stress
test (HAST)
130°C / 85% RH for 96 hours
High temperature stress
test (HTST)
150°C for 1000 hours
Table 6. DFN BOARDLEVEL QUALIFICATION
Board Level
Temperature
40°C to 125°C for 2500
cycles with no failures
Mechanical Information and Circuit Design Guidelines
BelaSigna 300 is available in two packages:
1. A 2.68 x 3.63 mm ultraminiature waferlevel chip scale package (WLCSP)
2. A 8.9 x 5 mm DFN package
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