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參數(shù)資料
| 型號： | AVC5000 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Integrated Dual 3D Video Format Converter |
| 中文描述： | 集成雙3D視頻格式轉(zhuǎn)換器 |
| 文件頁數(shù)： | 1/3頁 |
| 文件大?。?/td> | 534K |
| 代理商： | AVC5000 |
AVC5000
Integrated Dual 3D Video Format Converter
General Description
The highly integrated AVC5000 dual 3D adaptive video con-
verter accepts standard-and high-definition baseband ana-
log and digital video inputs and processes them for display in
single or multiple windows on the television screen. Stan-
dard video formats up to 1080p resolution with a 60 Hz frame
rate are supported. The converter is comprised of two main
blocks-a universal front-end and a dual-channel display pro-
cessor. The universal front-end accepts standard- and high-
definition video formats, PC graphics formats and DVI sig-
nals, and decodes the signals into component video or RGB.
Any two outputs from the universal front-end can be selected
for the dual-channel display processor. The dual 3D archi-
tecture features two 3D decoders, two 3D noise reducers,
two 3D deinterlacers, two high-order scalers for size and
aspect ratio scaling, luma and chroma enhancement, frame-
rate-conversion, adaptive contrast enhancement, multi-
picture functions (PIP/PAP/POP) including side-by-side dis-
play of two full-quality images on a wide screen, intelligent
color remapping and overlay of a bit mapped on-screen-
display (OSD). The output signal formats include analog
RGB or YPbPr for CRT displays and TTL or LVDS for flat
panel or microdisplay.
Features
Inputs
n
Five CVBS
n
Three Y/C
n
One standard- or high-definition component
n
One high-definition component
n
One VGA/HD
n
One SCART (RGB) with fast blank/HD component
n
One DVI-HDCP
n
Two 24-bit digital flexiport ports, each configurable as
RGB, Y/C or ITU-R BT656
Outputs
n
Supports standard video formats up to 1080p resolution
with a 60 Hz frame rate
n
One 24-bit TTL configurable as
o
24-bit RGB
o
20-bit
Y/C
n
Dual channel LVDS, configurable for 6-, 8- or 10-bit
panels, including interlaced (AliS) PDP
n
Triple 10-bit DACs rated at 250 MHz
n
One ITU-R BT656 for MPEG or video encoders
n
One analog CVBS Monitor Out (pass through)
Packaging
n
544-ball PBGA (35 mm, 1 mm ball pitch)
Applications
n
Digital televisions
n
Integrated HDTV televisions
n
Audio video receivers
Simplified Block Diagram
20154001
ADVANCE INFORMATION
May 2005
A
2005 National Semiconductor Corporation
DS201540
www.national.com
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