參數(shù)資料
型號: AUIRFS3006-7TRL
元件分類: JFETs
英文描述: 240 A, 60 V, 0.0021 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-263CB
封裝: ROHS COMPLIANT, PLASTIC, D2PAK-7
文件頁數(shù): 4/11頁
文件大小: 239K
代理商: AUIRFS3006-7TRL
AUIRFS3006-7P
2
www.irf.com
S
D
G
Pulse width ≤ 400μs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniquea refer to applocation
note # AN-994 echniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
RθJC value shown is at time zero.
Notes:
Calcuted continuous current based on maximum allowable junction
temperature Bond wire current limit is 240A. Note that current
limitation arising from heating of the device leds may occur with
some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.021mH
RG = 25Ω, IAS = 168A, VGS =10V. Part not recommended for use
above this value .
ISD ≤ 168A, di/dt ≤ 1410 A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
V(BR)DSS
Drain-to-Source Breakdown Voltage
60
–––
V
ΔV(BR)DSS/ΔTJ Breakdown Voltage Temp. Coefficient
–––
0.07
––– V/°C
RDS(on)
Static Drain-to-Source On-Resistance
–––
1.5
2.1
VGS(th)
Gate Threshold Voltage
2.0
–––
4.0
V
gfs
Forward Transconductance
290
–––
S
RG(int)
Internal Gate Resistance
–––
2.1
–––
Ω
IDSS
Drain-to-Source Leakage Current
–––
20
–––
250
IGSS
Gate-to-Source Forward Leakage
–––
100
Gate-to-Source Reverse Leakage
–––
-100
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Qg
Total Gate Charge
–––
200
300
Qgs
Gate-to-Source Charge
–––
37
–––
Qgd
Gate-to-Drain ("Miller") Charge
–––
60
–––
Qsync
Total Gate Charge Sync. (Qg - Qgd)
–––
140
–––
td(on)
Turn-On Delay Time
–––
14
–––
tr
Rise Time
–––
61
–––
td(off)
Turn-Off Delay Time
–––
118
–––
tf
Fall Time
–––
69
–––
Ciss
Input Capacitance
–––
8850
–––
Coss
Output Capacitance
–––
1007
–––
Crss
Reverse Transfer Capacitance
–––
525
–––
Coss eff. (ER) Effective Output Capacitance (Energy Related)i––– 1460 –––
Coss eff. (TR) Effective Output Capacitance (Time Related) h
–––
1915
–––
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
(Body Diode)
VSD
Diode Forward Voltage
–––
1.3
V
trr
Reverse Recovery Time
–––
44
–––
TJ = 25°C
VR = 51V,
–––
48
–––
TJ = 125°C
IF = 168A
Qrr
Reverse Recovery Charge
–––
51
–––
TJ = 25°C
di/dt = 100A/μs
g
–––
62
–––
TJ = 125°C
IRRM
Reverse Recovery Current
–––
2.03
–––
A
TJ = 25°C
ton
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
VDS = 25V, ID = 168A
293
1172
–––
pF
A
ns
nC
μA
nA
nC
ns
ID = 168A
RG = 2.7Ω
VGS = 10V g
VDD = 39V
ID = 168A, VDS =0V, VGS = 10V
TJ = 25°C, IS = 168A, VGS = 0V g
integral reverse
p-n junction diode.
Conditions
VGS = 0V, ID = 250μA
Reference to 25°C, ID = 5mAd
VGS = 10V, ID = 168A g
VDS = VGS, ID = 250μA
VDS = 60V, VGS = 0V
VDS = 60V, VGS = 0V, TJ = 125°C
MOSFET symbol
showing the
VDS = 30V
Conditions
VGS = 10V g
VGS = 0V
VDS = 50V
= 1.0MHz (See Fig 5)
VGS = 0V, VDS = 0V to 48V i(See Fig 11)
VGS = 0V, VDS = 0V to 48V h
Conditions
ID = 168A
VGS = 20V
VGS = -20V
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