參數(shù)資料
型號(hào)： AU5780D-T
廠商： NXP SEMICONDUCTORS
元件分類： 其它接口
英文描述： SAE/J1850/VPW transceiver
中文描述： SPECIALTY INTERFACE CIRCUIT, PDSO8
封裝： 3.90 MM, PLASTIC, MS-012AA, SOT-96-1, SOP-8
文件頁數(shù)： 7/10頁
文件大?。?/td> 79K
代理商： AU5780D-T
Philips Semiconductors
Product specification
AU5780
SAE/J1850/VPW transceiver
1998 Jun 30
7
DYNAMIC CHARACTERISTICS
–40
°
C < T
amb
< +125
°
C; 9V < V
BATT
< 16V; V
/LB
> 3V; 0V <V
BUS
< +8.5V;
R
S
= 56 k ; R
d
= 10 k ; R
f
= 15 k ; R
b
= 10 ; BUS_OUT: 300 < R
L
< 1.6 k ;
1.7 s < (R
L
* C
L
) < 5.2 s; 2.2 nF < C
L
< 16 nF; R
X
: C
L
< 40pF; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Pins TX, RX, /LB
t
p
t
pI
Delay TX to RX rising and falling edge
16
25
μ
s
μ
s
Delay TX to RX rising and falling edge in
loop-back mode
/LB low
16
25
t
p_lobatt
t
pI_lobatt
Delay TX to RX rising and falling edge
6V < V
BATT
< 9V
/LB low,
6V < V
BATT
< 9V
TX high, toggle /LB
16
25
μ
s
μ
s
Delay TX to RX rising and falling edge in
loop-back mode
16
25
t
dIb
Delay /LB to BUS_OUT
1
10
μ
s
Pin BUS_OUT
t
bo
t
bo_lobatt
Delay TX to BUS_OUT
measured at 3.875V
15
24
μ
s
μ
s
Delay TX to BUS_OUT
measured at 3.875V,
6V < V
BATT
< 9V
6V < V
BATT
< 16V;
measured at 1.5V and min
[6.25V, V
BATT
–2.75V]
6V < V
BATT
< 16V;
R
L
= 100 ; measured at 30% and
70% of waveform
15
24
V
sr
Bus output voltage slew rate
0.238
0.365
V/
μ
s
I
sr
Bus output current slew rate
0.87
2.1
mA/
μ
s
V
dB_limit
N
R
N
I
Pin Rs
Bus emissions voltage output
f > 500 kHz
–60
dBV
Bus noise rejection from battery
30 Hz < f < 250kHz
20
dB
Bus noise isolation from battery
250 kHz < f < 200 MHz
16
dB
K
sr
Slew rate relationship factor, Note 3
0.7
1
1.3
–
Pin BUS_IN
C
BIN
t
DRXON
;
T
DRXOFF
T
DRX_
Pin BATT
Bus Input capacitance
10
20
pF
Bus line to RX propagation delay
With 8V / 0V square wave input,
R
f
= 15k
t
DRXOFF
–t
DRXON
0.4
1.7
μ
s
Bus line to RX propagation delay mismatch
1
μ
s
t
low_power
time-out to low power state
TX low
1
4
ms
NOTES;
1. TX < 0.9V for more than 4 ms
2. For 6V < V
BATT
< 9V the bus output voltage is limited by the supply voltage.
For 16V < V
BATT
< 24V (jump start) the load is limited by the package power dissipation
ratings; the duration of this condition is recommended to be less than 90 seconds.
3. V
sr
= (K
sr
* V
sr.nom
* R
s.nom
) / R
s
with V
sr.nom
= 0.3 V/
μ
s; R
s.nom
= 56 k
; 45 k
< R
s
< 70 k
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