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參數(shù)資料
| 型號(hào)： | AU1000BOOTROM_REV1 |
| 英文描述： | Mapping a Boot ROM on the AMD Alchemy? Solutions Au1000? Processor? |
| 中文描述： | 映射于AMD Alchemy 1啟動(dòng)光盤？解決方案Au1000？處理器？ |
| 文件頁數(shù)： | 3/7頁 |
| 文件大?。?/td> | 46K |
| 代理商： | AU1000BOOTROM_REV1 |
Application Note
3
Mapping a Boot ROM on the Au1000 Processor
Rev. 1.2
January 2002
1. Introduction
The Au1000 processor contains integrated memory controllers for connecting RAM, ROM, and other peripherals to the
Au1000 processor. This document describes how to map a boot ROM in a system based on the Au1000, and focuses on
the use of the static memory controller for booting.
2. MIPS Architecture
The basic principles of where to map in a boot ROM are rooted in the MIPS architecture itself. Specifically, the MIPS
architecture specifies that upon reset, a MIPS processor must fetch from address 0xBFC00000, the Reset exception vector.
[1]
In the MIPS architecture, all addresses (instruction fetches, data loads and data stores) are virtual addresses. As a result,
address translation is always performed on program instruction fetches and data accesses. The type of address translation
depends upon the upper bits of the program address. The MIPS architecture defines the KUSEG, KSEG0 and KSEG1
regions according to these upper bits of the program’s virtual address. The program’s 32-bit memory space is thus
divided:
Figure 1: MIPS 32-bit Memory Map
The KUSEG region extends from 0x00000000 to 0x7FFFFFFF, a 2GB space which uses translation look-a-side buffers,
TLBs, to determine the corresponding physical address. The KUSEG region is accessible while the CPU is in either user
mode or kernel mode.
The KSEG0 region extends from 0x80000000 to 0x9FFFFFFF, a 512MB space which has a direct correlation to a physi-
cal address. In addition, the KSEG0 region is inherently cacheable; meaning that both instruction and data caching is
occuring for references to this area. The KSEG0 region is only accessible while the CPU is in kernel mode.
The KSEG1 region extends from 0xA0000000 to 0xBFFFFFFF, a 512MB space which also has a direct correlation to a
physical address. However, the KSEG1 region is inherently non-cacheable; meaning that any instruction or data reference
will bypass the cache and directly access physical memory. The KSEG1 region is only accessible while the CPU is in ker-
nel mode.
For the KSEG0 and KSEG1 regions, the corresponding physical address is bits 28:0 of the virtual address with address
bits 31:29 zero. That is, KSEG0 and KSEG1 map directly onto the first 512MB of physical memory. For example,
KSEG0 address 0x80000000 and KSEG1 address 0xA0000000 both map directly onto physical address 0x00000000. The
KSEG0 and KSEG1 regions provide two views of physical memory; one cacheable and one non-cacheable.
Reserved
KSEG1
KSEG0
KUSEG
Reserved
0x00000000
0x80000000
0xA0000000
0xC0000000
0xE0000000
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