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參數(shù)資料
| 型號(hào)： | ATTM01MG |
| 廠商： | AME, Inc. |
| 英文描述： | Processor Thermal Monitor |
| 中文描述： | 處理器熱監(jiān)視器 |
| 文件頁(yè)數(shù)： | 5/18頁(yè) |
| 文件大?。?/td> | 156K |
| 代理商： | ATTM01MG |
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AME, Inc.
5
ATTM01/ATTM02
Processor Thermal Monitor
Rev. B.01
Parameter
Symbol
Test Conditions
Min
Typ
Max Units
Serial Clock Frequency
f
SMBCLK
(Note 3)
100
kHz
START Condition Setup Time
4.7
μs
Repeat START Condition Setup Time
t
SU:STA
90% to 90%
50
ns
START Condition Hold Time
t
HD:STA
10% of SMBDATA to 90% of SMBCLK
4
μs
STOP Condition Setup Time
t
SU:STO
90% of SMBCLK to 90% of SMBDATA
4
μs
Clock Low Period
t
LOW
10% to 10%
4.7
μs
Clock High Period
t
HIGH
90% to 90%
4
μs
Data Setup Time
t
HD:DAT
(Note 4)
250
μs
Receive SMBCLK/SMBDATA Rise Time
t
R
1
μs
Receive SMBCLK/SMBDATA Fall Time
t
F
300
ns
Pulse Width of Spike Suppressed
t
SP
0
60
ns
SMBus Timeout
t
TIMEOUT
SMBDATA low period for interface reset
25
37
45
ms
SMBus-COMPATIBLE TIMING
(Note 2)
μs
Bus Free Time Between STOP and
START Condition
t
BUF
4.7
6. Electrical Specifications
Note 1: All parameters tested at a single temperature. Specifications over temperature are guaranteed by design.
Note 2: Timing specifications guaranteed by design.
Note 3: The serial interface resets when SMBCLK is low for more than t
.
Note 4: A transition must internally provide at least a hold time to bridge the undefined region (300ns max) of
SMBCLK
’
s falling edge.
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