參數(shù)資料
型號(hào)： ATTL7583BF
廠商： ZARLINK SEMICONDUCTOR INC
元件分類(lèi)： 通信及網(wǎng)絡(luò)
英文描述： SPECIALTY TELECOM CIRCUIT, PDIP24
封裝： 0.600 INCH, PLASTIC, DIP-24
文件頁(yè)數(shù)： 8/21頁(yè)
文件大小： 398K
代理商： ATTL7583BF
16
Data Sheet
February 2001
L7583A/B/C/D Line Card Access Switch
Application (continued)
Table 16. Truth Table for L7583A/B
1. If TSD = 5 V, the thermal shutdown mechanism is disabled. If TSD is floating, the thermal shutdown mechanism is active.
2. Forcing TSD to ground overrides the logic input pins and forces an all OFF state.
3. Idle/Talk state.
4. TESTout state.
5. TESTin state
6. Power ringing state.
7. Ringing generator test state.
8. Simultaneous TESTout and TESTin state.
9. All OFF state.
A parallel in/parallel out data latch is integrated into the L7583A/B. Operation of the data latch is controlled by the logic level
input pin LATCH. The data input to the latch is the INPUT pin of the L7583A/B, and the output of the data latch is an internal
node used for state control.
When the LATCH control pin is at logic 0, the data latch is transparent and data control signals flow directly from INPUT,
through the data latch to state control. Any changes in INPUT will be reflected in the state of the switches.
When the LATCH control pin is at logic 1, the data latch is active—the L7583A/B will no longer react to changes at the
INPUT control pin. The state of the switches is now latched; that is, the state of the switches will remain as they were when the
LATCH input transitioned from logic 0 to logic 1. The switches will not respond to changes in INPUT as long as LATCH is
held high.
Note that the TSD input is not tied to the data latch. TSD is not affected by the LATCH input. TSD input will override state con-
trol via INPUT and LATCH.
INRING
INTESTin INTESTout
TSD
TESTin
Switches
Break
Switches
Ring Test
Switches
Ring
Switches
TESTout
Switches
0 V
5 V/Float1
Off
On
Off
Off3
0 V
5 V
5 V/Float1
Off
On4
0 V
5 V
0 V
5 V/Float1
On
Off
Off5
5 V
0 V
5 V/Float1
Off
On
Off6
5 V
0 V
5 V/Float1
Off
On
Off
Off7
0 V
5 V
5 V/Float1
On
Off
On8
5 V
0 V
5 V
5 V/Float1
Off
Off9
5 V
5 V/Float1
Off
Off9
Don’t
Care
Don’t
Care
Don’t
Care
0 V2
Off
Off9
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