參數(shù)資料
型號: ATTINY43U-MUR
廠商: Atmel
文件頁數(shù): 72/158頁
文件大?。?/td> 0K
描述: MCU AVR 4KB FLASH 8MHZ 20QFN
產(chǎn)品培訓(xùn)模塊: tinyAVR Introduction
標(biāo)準(zhǔn)包裝: 6,000
系列: AVR® ATtiny
核心處理器: AVR
芯體尺寸: 8-位
速度: 8MHz
連通性: USI
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 16
程序存儲器容量: 4KB(2K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 64 x 8
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-WFQFN 裸露焊盤
包裝: 帶卷 (TR)
20
8048C–AVR–02/12
ATtiny43U
5.4
I/O Memory
The I/O space definition of the ATtiny43U is shown in “Register Summary” on page 195.
All I/Os and peripherals are placed in the I/O space. All I/O locations may be accessed by the
LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32 general purpose
working registers and the I/O space. I/O Registers within the address range 0x00 - 0x1F are
directly bit-accessible using the SBI and CBI instructions. In these registers, the value of single
bits can be checked by using the SBIS and SBIC instructions. See the instruction set section for
more details. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 -
0x3F must be used. When addressing I/O Registers as data space using LD and ST instruc-
tions, 0x20 must be added to these addresses.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most
other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can therefore
be used on registers containing such Status Flags. The CBI and SBI instructions work with reg-
isters 0x00 to 0x1F only.
The I/O and Peripherals Control Registers are explained in later sections.
5.4.1
General Purpose I/O Registers
ATtiny43U contains three General Purpose I/O Registers. These registers can be used for stor-
ing any information, and they are particularly useful for storing global variables and status flags.
General Purpose I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible
using the SBI, CBI, SBIS, and SBIC instructions.
5.5
Register Description
5.5.1
EEAR – EEPROM Address Register
Bits 7:6 – Res: Reserved Bits
These bits are reserved and will always read zero.
Bits 5:0 – EEAR[5:0]: EEPROM Address
The EEPROM Address Register – EEAR – specifies the EEPROM address. The EEPROM data
bytes are addressed linearly in the range 0...(64-1). The initial value of EEAR is undefined. A
proper value must be written before the EEPROM may be accessed.
Bit
765
432
10
EEAR5
EEAR4
EEAR3
EEAR2
EEAR1
EEAR0
EEAR
Read/Write
R
R/W
Initial Value
0
X
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