PIC18CXX2
DS39026C-page 186
2000 Microchip Technology Inc.
FIGURE 18-2:
WAKE-UP FROM SLEEP THROUGH INTERRUPT(1,2)
18.4
Program Verification/Code
Protection
If the code protection bit(s) have not been pro-
grammed, the on-chip program memory can be read
out for verification purposes.
18.5
ID Locations
Five memory locations (200000h - 200004h) are desig-
nated as ID locations, where the user can store check-
sum or other code identification numbers. These
locations are accessible during normal execution
through the TBLRD instruction or during program/verify.
The ID locations can be read when the device is code
protected.
18.6
In-Circuit Serial Programming
PIC18CXXX microcontrollers can be serially pro-
grammed while in the end application circuit. This is
simply done with two lines for clock and data, and three
other lines for power, ground and the programming
voltage. This allows customers to manufacture boards
with unprogrammed devices, and then program the
microcontroller just before shipping the product. This
also allows the most recent firmware or a custom firm-
ware to be programmed.
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
OSC1
CLKOUT(4)
INT pin
INTF Flag
(INTCON<1>)
GIEH bit
(INTCON<7>)
INSTRUCTION FLOW
PC
Instruction
Fetched
Instruction
Executed
PC
PC+2
PC+4
Inst(PC) = SLEEP
Inst(PC - 1)
Inst(PC + 2)
SLEEP
Processor in
SLEEP
Interrupt Latency(3)
Inst(PC + 4)
Inst(PC + 2)
Inst(0008h)
Inst(000Ah)
Inst(0008h)
Dummy cycle
PC + 4
0008h
000Ah
Dummy cycle
TOST(2)
PC+4
Note 1: XT, HS or LP oscillator mode assumed.
2: GIE = ’1’ assumed. In this case, after wake- up, the processor jumps to the interrupt routine. If GIE = ’0’, execution will continue in-line.
3: TOST = 1024TOSC (drawing not to scale) This delay will not occur for RC and EC osc modes.
4: CLKOUT is not available in these osc modes, but shown here for timing reference.
Note:
Microchip Technology does not recom-
mend code protecting windowed devices.