參數(shù)資料
型號: ATSAM3X8CA-AU
廠商: Atmel
文件頁數(shù): 31/71頁
文件大?。?/td> 0K
描述: IC MCU 2X256KB CORTEX-M3 100-QFP
標(biāo)準(zhǔn)包裝: 90
系列: SAM3X
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 84MHz
連通性: CAN,以太網(wǎng),I²C,IrDA,LIN,MMC,SPI,SSC,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 63
程序存儲器容量: 512KB(512K x 8)
程序存儲器類型: 閃存
RAM 容量: 96K x 8
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b,D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
39
11057BS–ATARM–13-Jul-12
SAM3X/A
39
11057BS–ATARM–13-Jul-12
SAM3X/A
The user can choose between high performance or lower current consumption by selecting
either 128-bit or 64-bit access. It also manages the programming, erasing, locking and unlocking
sequences of the Flash using a full set of commands.
One of the commands returns the embedded Flash descriptor definition that informs the system
about the Flash organization, thus making the software generic.
9.1.3.4
Lock Regions
Several lock bits used to protect write and erase operations on lock regions. A lock region is
composed of several consecutive pages, and each lock region has its associated lock bit.
If a locked-region’s erase or program command occurs, the command is aborted and the EEFC
triggers an interrupt.
The lock bits are software programmable through the EEFC User Interface. The “Set Lock Bit”
command enables the protection. The “Clear Lock Bit” command unlocks the lock region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
9.1.3.5
Security Bit Feature
The SAM3X/A series features a security bit, based on a specific General Purpose NVM bit
(GPNVM bit 0). When the security is enabled, any access to the Flash, either through the ICE
interface or through the Fast Flash Programming Interface, is forbidden. This ensures the confi-
dentiality of the code programmed in the Flash.
This security bit can only be enabled through the “Set General Purpose NVM Bit 0” command of
the EEFC0 User Interface. Disabling the security bit can only be achieved by asserting the
ERASE pin at 1, and after a full Flash erase is performed. When the security bit is deactivated,
all accesses to the Flash are permitted.
It is important to note that the assertion of the ERASE pin should always be longer than 200 ms.
As the ERASE pin integrates a permanent pull-down, it can be left unconnected during normal
operation. However, it is safer to connect it directly to GND for the final application.
9.1.3.6
Calibration Bits
NVM bits are used to calibrate the brownout detector and the voltage regulator. These bits are
factory configured and cannot be changed by the user. The ERASE pin has no effect on the cal-
ibration bits.
9.1.3.7
Unique Identifier
Each device integrates its own 128-bit unique identifier. These bits are factory configured and
cannot be changed by the user. The ERASE pin has no effect on the unique identifier.
9.1.3.8
Fast Flash Programming Interface
The Fast Flash Programming Interface allows device programming through multiplexed fully-
handshaked parallel port. It allows gang programming with market-standard industrial
programmers.
Table 9-1.
Number of Lock Bits
Product
Number of Lock Bits
Lock Region Size
ATSAM3X/A8
32
16 kbytes (64 pages)
ATSAM3X/A4
16
16 kbytes (64 pages)
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