參數(shù)資料
型號: ATSAM3U1EA-AU
廠商: Atmel
文件頁數(shù): 12/60頁
文件大小: 0K
描述: IC MCU 32BIT 64KB FLASH 144LQFP
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
Cortex®-M3 Introduction and Specific SAM3U Implementation
SAM3U Cortex-M3 Based MCU Introduction
Touch Solutions on the Atmel ARM? Cortex?-M3 Based Flash Microcontrollers
標(biāo)準(zhǔn)包裝: 60
系列: SAM3U
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 96MHz
連通性: EBI/EMI,I²C,MMC,SPI,SSC,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 96
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
RAM 容量: 20K x 8
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b,8x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 144-LQFP
包裝: 托盤
配用: ATSAM3U-EK-ND - KIT EVAL FOR AT91SAM3U CORTEX
2
6430FS–ATARM–10-Feb-12
SAM3U Series
1.
SAM3U Description
Atmel's SAM3U series is a member of a family of Flash microcontrollers based on the high per-
formance 32-bit ARM Cortex-M3 RISC processor. It operates at a maximum speed of 96 MHz
and features up to 256 Kbytes of Flash and up to 52 Kbytes of SRAM. The peripheral set
includes a High Speed USB Device port with embedded transceiver, a High Speed MCI for
SDIO/SD/MMC, an External Bus Interface with NAND Flash controller, up to 4xUSARTs
(SAM3U1C/2C/4C have 3), up to 2xTWIs (SAM3U1C/2C/4C have 1), up to 5xSPIs
SAM3U1C/2C/4C have 4), as well as 4xPWM timers, 3xgeneral purpose 16-bit timers, an RTC,
a 12-bit ADC and a 10-bit ADC.
The SAM3U architecture is specifically designed to sustain high speed data transfers. It includes
a multi-layer bus matrix as well as multiple SRAM banks, PDC and DMA channels that enable it
to run tasks in parallel and maximize data throughput.
It can operate from 1.62V to 3.6V and comes in 100-pin and 144-pin LQFP and BGA packages.
The SAM3U device is particularly well suited for USB applications: data loggers, PC peripherals
and any high speed bridge (USB to SDIO, USB to SPI, USB to External Bus Interface).
1.1
Configuration Summary
The SAM3U series differ in memory sizes, package and features list. Table 1-1 summarizes the
configurations of the six devices.
Note:
1. The SRAM size takes into account the 4-Kbyte RAM buffer of the NAND Flash Controller (NFC) which can be used by the
core if not used by the NFC.
Table 1-1.
Configuration Summary
Device
Flash
Organization SRAM
Number
of PIOs
Number
of
USARTs
Number
of TWI
FWUP,
SHDN
pins
External Bus
Interface
HSMCI
data
size
Package
ADC
SAM3U4E
2x128
Kbytes
dual plane
52
Kbytes
96
4
2
Yes
8 or 16 bits,
4 chip selects,
24-bit address
8 bits
LQFP144
BGA144
2 (8+ 8
channels)
SAM3U2E
128
Kbytes
single plane
36
Kbytes
96
4
2
Yes
8 or 16 bits,
4 chip selects
24-bit address
8 bits
LQFP144
BGA144
2 (8+ 8
channels)
SAM3U1E
64
Kbytes
single plane
20
Kbytes
96
4
2
Yes
8 or 16 bits,
4 chip selects,
24-bit address
8 bits
LQFP144
BGA144
2 (8+ 8
channels)
SAM3U4C
2 x 128
Kbytes
dual plane
52
Kbytes
57
3
1
FWUP
8 bits,
2 chip selects,
8-bit address
4 bits
LQFP100
BGA100
2 (4+ 4
channels)
SAM3U2C
128
Kbytes
single plane
36
Kbytes
57
3
1
FWUP
8 bits,
2 chip selects, 8-
bit address
4 bits
LQFP100
BGA100
2 (4+ 4
channels)
SAM3U1C
64
Kbytes
single plane
20
Kbytes
57
3
1
FWUP
8 bits
2 chip selects,
8-bit address
4 bits
LQFP100
BGA100
2 (4+ 4
channels)
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