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參數(shù)資料
| 型號： | ATR2805SF/CH |
| 元件分類： | 電源模塊 |
| 英文描述： | 1-OUTPUT 25 W DC-DC REG PWR SUPPLY MODULE |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 116K |
| 代理商： | ATR2805SF/CH |
5
ATR2812S
TABLE II. Electrical Performance Characteristics - Continued.
Test
Symbol
Conditions
-55
°C ≤ T
C
≤ +125°C
VIN = 28 V dc ±5%, CL = 0 unless
otherwise specified
Group A
Subgroups
Device
types
Limits
Unit
Min
Max
Switching frequency
FS
IOUT = 2500 mA
4,5,6
01
500
600
KHz
Sync frequency range
Fsync
IOUT = 2500 mA
4,5,6
01
500
700
KHz
Output response to step
transient load changes
7/
VOTLOAD
1250 mA to/from 2500 mA
4,5,6
01
-800
+800
mV pk
200 mA to/from 1250 mA
4,5,6
-1000
+1000
Recovery time step
transient load changes 7/ 8/
TTLOAD
1250 mA to/from 2500 mA
4
01
100
s
5,6
200
200 mA to/from 1250 mA
4
100
5,6
200
Output response to
transient step line changes
5/ 9/
VOTLINE
Input step 16 V to/from
40 V dc, IOUT = 2500 mA
4,5,6
01
±1200
mV pk
Recovery time transient
step line changes 5/ 8/ 9/
TTLINE
Input step 16 V to/from
40 V dc, IOUT = 2500 mA
4,5,6
01
10
ms
Turn on overshoot
VTonos
IOUT = 0 and 2500 mA
4,5,6
01
800
mV pk
Turn on delay
10/
TonD
IOUT = 0 and 2500 mA
4,5,6
01
25
ms
Load fault recovery 5/ 10/
TrLF
4,5,6
01
25
ms
Notes:
1/ Parameter guaranteed by line and load regulation tests.
2/
Bandwidth guaranteed by design. Tested for 20 KHz to 2 MHz.
3/
Output voltage measured at load with remote sense leads connected across load.
4/
Capacitive load may be any value from 0 to the maximum limit without compromising dc performance. A capacitive load in excess of the maximum
limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn on.
5/
Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be guaranteed to the limits
specified in Table II.
6/
An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the
condition of maximum power dissipation.
7/
Load step transition time between 2 and 10 microseconds.
8/
Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1 percent of VOUT at 50 percent load.
9/
Input step transition time between 2 and 10 microseconds.
10/ Turn on delay time measurement is for either a step application of power at the input or the removal of a ground signal from the inhibit pin (pin 2)
while power is applied to the input.
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