8201, 8202, 8203, 8204 Acceleration Processor Data Sheet, DS-0157-05
Page 102
Exar Confidential
5. If dual command pointer ring mode is enabled, the host should update the
appropriate command write pointer of Command Pointer Ring 0 or Command
Pointer Ring 1.
6. As long as the read and the write pointer registers for Command Pointer Ring 0 or
Command Pointer Ring 1 are not equal, the 820x recognizes that commands are
available to fetch from host memory. A command read request will be sent by the
820x Read Request Controller which will alternate sending the command to either
Command Pointer Ring 0 or Command Pointer Ring 1. In this example, the
command is sent to Command Pointer Ring 0.
7. The 820x reads the source descriptor to determine the location of the source data
and the operation. The Compression, Decompression, Hash, and Pad engines
process the data according to the control fields in the command structure.
8. The 820x writes the slice hash values and file chaining hash value to the first
destination buffer if the command has Hash related operation.
9. After the Compression, Decompression, Hash, and Pad engines complete
processing the data, the 820x writes the result data to the host destination buffers
whose location is defined in the destination descriptor.
10. After the 820x writes the result data to host memory, it updates the appropriate
command structure Result Ring. Because the 820x has two channels (each channel
includes one group of Compression, Decompression, Hash, and Pad engines) which
process commands in parallel, and the commands may have different sizes, it is
very probable for commands to complete out of order. The Result Ring is used to
keep track of the finished commands.