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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | ATMEGA324PA-CUR |
| 寤犲晢锛� | Atmel |
| 鏂囦欢闋佹暩(sh霉)锛� | 8/54闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | MCU AVR 32KB FLSH 20 MHZ 49VFBGA |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | megaAVR Introduction |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 6,000 |
| 绯诲垪锛� | AVR® ATmega |
| 鏍稿績铏曠悊鍣細 | AVR |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 20MHz |
| 閫ｉ€氭€э細 | I²C锛孲PI锛孶ART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | 娆犲妾㈡脯/寰�(f霉)浣�锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 32 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 32KB锛�16K x 16锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| EEPROM 澶�?銆�?/td> | 1K x 8 |
| RAM 瀹归噺锛� | 2K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.8 V ~ 5.5 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 8x10b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 49-VFBGA |
| 鍖呰锛� | 甯跺嵎 (TR) |
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PIC16C925/926
DS39544A-page 142
Preliminary
2001 Microchip Technology Inc.
IPD
Power-down Current (Note 3)
D020
PIC16LC925/926
鈥�
0.9
5
AVDD = 3.0V
D020
PIC16C925/926
鈥�
1.5
21
A
VDD = 4.0V
Module Differential Current (Note 5)
D021
IWDT
Watchdog Timer
PIC16LC925/926
鈥�
6.0
20
AVDD = 3.0V
D021
Watchdog Timer
PIC16C925/926
鈥�
9.0
25
A
VDD = 4.0V
D022
ILCDT1
LCD Voltage
Generation with
internal RC osc enabled
PIC16LC925/926
鈥�
36
50
AVDD = 3.0V (Note 7)
D022
LCD Voltage
Generation with
internal RC osc enabled
PIC16C925/926
鈥�
40
55
A
VDD = 4.0V (Note 7)
D022A
IBOR
Brown-out Reset
鈥�
100
150
A
BODEN bit set, VDD = 5.0
D024
ILCDT1
LCD Voltage
Generation with
Timer1 @ 32.768 kHz
PIC16LC925/926
鈥�
15
29
AVDD = 3.0V (Note 7)
D024
LCD Voltage
Generation with
Timer1 @ 32.768 kHz
PIC16C925/926
鈥�
33
60
A
VDD = 4.0V (Note 7)
15.1
DC Characteristics
(Continued)
PIC16LC925/926
(Commercial, Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40掳C
鈮� TA 鈮� +85掳C for industrial
0掳C
鈮� TA 鈮� +70掳C for commercial
PIC16C925/926
(Commercial, Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40掳C
鈮� TA 鈮� +85掳C for industrial
0掳C
鈮� TA 鈮� +70掳C for commercial
Param
No.
Sym
Characteristic
Min
Typ Max Units
Conditions
Data in "Typ" column is at 5V, 25掳C unless otherwise stated. These parameters are for design guidance only
and are not tested.
Note 1: This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data.
2: The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin load-
ing and switching rate, oscillator type, internal code execution pattern, and temperature also have an impact on
the current consumption.The test conditions for all IDD measurements in active operation mode are:
OSC1 = external square wave, from rail to rail;
all I/O pins tri-stated, pulled to VDD
MCLR = VDD.
3: The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is
measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS.
4: For RC osc configuration, current through REXT is not included. The current through the resistor can be esti-
mated by the formula Ir = VDD/2REXT (mA) with REXT in kOhm.
5: The
current is the additional current consumed when this peripheral is enabled. This current should be
added to the base IDD or IPD measurement.
6: PWRT must be enabled for slow ramps.
7:
螜LCDT1 and 螜LCDRC includes the current consumed by the LCD Module and the voltage generation
circuitry. This does not include current dissipated by the LCD panel.
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| ATMEGA324PA-D | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 32KB 1KB EE 20MHz 2KB SRAM 5V RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| ATMEGA324PA-MCH | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 32KB 1KB EE 20MHz 2KB SRAM 5V RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
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| ATMEGA324PA-MNR | 鍔熻兘鎻忚堪:20 MHZ, QFP, 105C 鍒堕€犲晢:microchip technology 绯诲垪:AVR? ATmega 鍖呰:鍓垏甯讹紙CT锛� 闆朵欢鐙€鎱�(t脿i):鍦ㄥ敭 鏍稿績铏曠悊鍣�:AVR 鏍稿績灏哄:8-浣� 閫熷害:20MHz 閫ｆ帴鎬�:I2C锛孲PI锛孶ART/USART 澶栬ō(sh猫):娆犲妾㈡脯/寰�(f霉)浣�锛孭OR锛孭WM锛學DT I/O 鏁�(sh霉):32 绋嬪簭瀛樺劜瀹归噺:32KB锛�16K x 16锛� 绋嬪簭瀛樺劜鍣ㄩ鍨�:闁冨瓨 EEPROM 瀹归噺:1K x 8 RAM 瀹归噺:2K x 8 闆诲 - 闆绘簮锛圴cc/Vdd锛�:1.8 V ~ 5.5 V 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒:A/D 8x10b 鎸暕鍣ㄩ鍨�:鍏�(n猫i)閮� 宸ヤ綔婧害:-40掳C ~ 105掳C锛圱A锛� 灏佽/澶栨:44-VFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗗櫒浠跺皝瑁�:44-VQFN锛�7x7锛� 妯�(bi膩o)婧�(zh菙n)鍖呰:1 |
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