參數(shù)資料
型號： ATMEGA164PA-AUR
廠商： Atmel
文件頁數(shù)： 55/160頁
文件大小： 0K
描述： MCU AVR 16KB FLASH 20MHZ 44TQFP
產(chǎn)品培訓模塊： megaAVR Introduction
標準包裝： 1
系列： AVR® ATmega
核心處理器： AVR
芯體尺寸： 8-位
速度： 20MHz
連通性： I²C，SPI，UART/USART
外圍設備： 欠壓檢測/復位，POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 16KB（8K x 16）
程序存儲器類型： 閃存
EEPROM 大小： 512 x 8
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 5.5 V
數(shù)據(jù)轉換器： A/D 8x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-TQFP
包裝： 剪切帶 (CT)
其它名稱： ATMEGA164PA-AURCT
148
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
Register bit for the OC2x pin (DDR_OC2x) must be set as output before the OC2x value is visi-
ble on the pin. The port override function is independent of the Waveform Generation mode.
The design of the Output Compare pin logic allows initialization of the OC2x state before the out-
put is enabled. Note that some COM2x1:0 bit settings are reserved for certain modes of
17.6.1
Compare Output Mode and Waveform Generation
The Waveform Generator uses the COM2x1:0 bits differently in normal, CTC, and PWM modes.
For all modes, setting the COM2x1:0 = 0 tells the Waveform Generator that no action on the
OC2x Register is to be performed on the next compare match. For compare output actions in the
non-PWM modes refer to Table 17-5 on page 158. For fast PWM mode, refer to Table 17-6 on
page 158, and for phase correct PWM refer to Table 17-7 on page 159.
A change of the COM2x1:0 bits state will have effect at the first compare match after the bits are
written. For non-PWM modes, the action can be forced to have immediate effect by using the
FOC2x strobe bits.
17.7
Modes of operation
The mode of operation, that is, the behavior of the Timer/Counter and the Output Compare pins,
is defined by the combination of the Waveform Generation mode (WGM22:0) and Compare Out-
put mode (COM2x1:0) bits. The Compare Output mode bits do not affect the counting sequence,
while the Waveform Generation mode bits do. The COM2x1:0 bits control whether the PWM out-
put generated should be inverted or not (inverted or non-inverted PWM). For non-PWM modes
the COM2x1:0 bits control whether the output should be set, cleared, or toggled at a compare
For detailed timing information refer to ”Timer/Counter Timing diagrams” on page 152.
17.7.1
Normal Mode
The simplest mode of operation is the Normal mode (WGM22:0 = 0). In this mode the counting
direction is always up (incrementing), and no counter clear is performed. The counter simply
overruns when it passes its maximum 8-bit value (TOP = 0xFF) and then restarts from the bot-
tom (0x00). In normal operation the Timer/Counter Overflow Flag (TOV2) will be set in the same
timer clock cycle as the TCNT2 becomes zero. The TOV2 Flag in this case behaves like a ninth
bit, except that it is only set, not cleared. However, combined with the timer overflow interrupt
that automatically clears the TOV2 Flag, the timer resolution can be increased by software.
There are no special cases to consider in the Normal mode, a new counter value can be written
anytime.
The Output Compare unit can be used to generate interrupts at some given time. Using the Out-
put Compare to generate waveforms in Normal mode is not recommended, since this will
occupy too much of the CPU time.
17.7.2
Clear Timer on Compare Match (CTC) Mode
In Clear Timer on Compare or CTC mode (WGM22:0 = 2), the OCR2A Register is used to
manipulate the counter resolution. In CTC mode the counter is cleared to zero when the counter
value (TCNT2) matches the OCR2A. The OCR2A defines the top value for the counter, hence
also its resolution. This mode allows greater control of the compare match output frequency. It
also simplifies the operation of counting external events.
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ATMEGA164PA-MCHR 功能描述:8位微控制器 -MCU AVR,16KB FLASH,20MHZ 512B EE,IND TEMP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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