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參數(shù)資料
| 型號： | ATF750LVC20SC |
| 英文描述： | Logic IC |
| 中文描述： | 邏輯IC |
| 文件頁數(shù)： | 1/16頁 |
| 文件大?。?/td> | 432K |
| 代理商： | ATF750LVC20SC |
1
Features
Advanced, High-speed, Electrically-erasable Programmable Logic Device
– Superset of 22V10
– Enhanced Logic Flexibility
– Backward Compatible with ATV750B/BL and ATV750/L
Low-power Edge-sensing “L” Option with 1 mA Standby Current
D- or T-type Flip-flop
Product Term or Direct Input Pin Clocking
7.5 ns Maximum Pin-to-pin Delay with 5V Operation
Highest Density Programmable Logic Available in 24-pin Package
– Advanced Electrically-erasable Technology
– Reprogrammable
– 100% Tested
Increased Logic Flexibility
– 42 Array Inputs, 20 Sum Terms and 20 Flip-flops
Enhanced Output Logic Flexibility
– All 20 Flip-flops Feed Back Internally
– 10 Flip-flops are also Available as Outputs
Programmable Pin-keeper Circuits
Dual-in-line and Surface Mount Package in Standard Pinouts
Commercial and Industrial Temperature Ranges
20-year Data Retention
2000V ESD Protection
1000 Erase/Write Cycles
Block Diagram
Description
The ATF750C(L)s are twice as powerful as most other 24-pin programmable logic
devices. Increased product terms, sum terms, flip-flops and output logic configurations
translate into more usable gates. High-speed logic and uniform predictable delays
PROGRAMMABLE
INTERCONNECT
AND
COMBINATORIAL
LOGIC ARRAY
LOGIC
OPTION
(UP T0 20
FLIP-FLOPS)
OUTPUT
OPTION
4 TO 8
PRODUCT
TERMS
(OE PRODUCT TERMS)
10
I/O
PINS
12
INPUT
PINS
(CLOCK PIN)
Rev. 0776H–03/01
High-speed
Complex
Programmable
Logic Device
ATF750C
ATF750CL
Pin Configurations
Pin Name
Function
CLK
Clock
IN
Logic Inputs
I/O
Bi-directional Buffers
GND
Ground
VCC
+5V Supply
(continued)
DIP/SOIC/TSSOP
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
PLCC
5
6
7
8
9
10
11
25
24
23
22
21
20
19
IN
IN
IN
GND *
IN
IN
IN
I/O
I/O
I/O
GND *
I/O
I/O
I/O
4
3
2
1
2
2
2
1
1
1
1
1
1
1
I
I
G
G
I
I
I
I
I
C
V
V
I
I
Note:
For PLCC, pins 1, 8, 15, and 22
can be left unconnected. For
superior performance, connect
VCC to pin 1 and GND to pins
8, 15, and 22.
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