參數(shù)資料
      型號(hào): ATF22V10B-25PI
      廠商: ATMEL CORP
      元件分類(lèi): PLD
      英文描述: High- Performance EE PLD
      中文描述: FLASH PLD, 25 ns, PDIP24
      封裝: 0.300 INCH, PLASTIC, DIP-24
      文件頁(yè)數(shù): 1/13頁(yè)
      文件大?。?/td> 294K
      代理商: ATF22V10B-25PI
      1
      Features
      3.0V to 5.5V Operating Range
      Advanced Low-voltage, Zero-power, Electrically Erasable Programmable Logic Device
      Edge-sensing “Zero” Power
      Low-voltage Equivalent of ATF22V10CZ
      “Zero” Standby Power (25 μA Maximum) (Input Transition Detection)
      Ideal for Battery Powered Systems
      CMOS- and TTL-compatible Inputs and Outputs
      Latch Feature Hold Inputs to Previous Logic States
      Advanced EE Technology
      – Reprogrammable
      – 100% Tested
      High-reliability CMOS Process
      – 20-year Data Retention
      – 100 Erase/Write Cycles
      – 2,000V ESD Protection
      – 200 mA Latch-up Immunity
      Commercial and Industrial Temperature Ranges
      Dual Inline and Surface Mount Standard Pinouts
      Inputs are 5V Tolerant
      Block Diagram
      High-
      performance
      EE PLD
      ATF22LV10CZ
      ATF22LV10CQZ
      Rev. 0779J–11/00
      Pin Configurations
      All Pinouts Top View
      Pin Name
      Function
      CLK
      Clock
      IN
      Logic Inputs
      I/O
      Bi-directional Buffers
      GND
      Ground
      VCC
      (3 to 5.5V) Supply
      PLCC
      TSSOP
      Note:
      TSSOP is the smallest package
      of SPLD offering.
      1
      2
      3
      4
      5
      6
      7
      8
      9
      10
      11
      12
      24
      23
      22
      21
      20
      19
      18
      17
      16
      15
      14
      13
      CLK/IN
      IN
      IN
      IN
      IN
      IN
      IN
      IN
      IN
      IN
      IN
      GND
      VCC
      I/O
      I/O
      I/O
      I/O
      I/O
      I/O
      I/O
      I/O
      I/O
      I/O
      IN
      DIP/SOIC
      1
      2
      3
      4
      5
      6
      7
      8
      9
      10
      11
      12
      24
      23
      22
      21
      20
      19
      18
      17
      16
      15
      14
      13
      CLK/IN
      IN
      IN
      IN
      IN
      IN
      IN
      IN
      IN
      IN
      IN
      GND
      VCC
      I/O
      I/O
      I/O
      I/O
      I/O
      I/O
      I/O
      I/O
      I/O
      I/O
      IN
      Note:
      For PLCC, pins 1, 8, 15, and
      22 can be left unconnected.
      For superior performance,
      connect VCC to pin 1 and
      GND to pins 8, 15, and 22.
      5
      6
      7
      8
      9
      10
      11
      25
      24
      23
      22
      21
      20
      19
      IN
      IN
      IN
      GND*
      IN
      IN
      IN
      I/O
      I/O
      I/O
      GND*
      I/O
      I/O
      I/O
      4
      3
      2
      1
      2
      2
      2
      1
      1
      1
      1
      1
      1
      1
      I
      I
      G
      G
      I
      I
      I
      I
      I
      C
      V
      V
      I
      I
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