參數(shù)資料
型號(hào): AT91SAM9G20B-CFU
廠商: Atmel
文件頁數(shù): 28/42頁
文件大?。?/td> 0K
描述: IC MCU ARM9 247-LFBGA
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 240
系列: SAM9G
核心處理器: ARM9
芯體尺寸: 16/32-位
速度: 400MHz
連通性: EBI/EMI,以太網(wǎng),I²C,IrDA,ISI,MMC,SPI,SSC,UART/USART,USB
外圍設(shè)備: DMA,POR,PWM,WDT
輸入/輸出數(shù): 96
程序存儲(chǔ)器容量: 64KB(64K x 8)
程序存儲(chǔ)器類型: ROM
RAM 容量: 96K x 8
電壓 - 電源 (Vcc/Vdd): 0.9 V ~ 1.1 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 247-TFBGA
包裝: 托盤
34
6384DS–ATARM–13-Jan-10
AT91SAM9G20 Summary
10.4
Embedded Peripherals
10.4.1
Serial Peripheral Interface
Supports communication with serial external devices
– Four chip selects with external decoder support allow communication with up to 15
peripherals
– Serial memories, such as DataFlash and 3-wire EEPROMs
– Serial peripherals, such as ADCs, DACs, LCD Controllers, CAN Controllers and
Sensors
– External co-processors
Master or slave serial peripheral bus interface
– 8- to 16-bit programmable data length per chip select
– Programmable phase and polarity per chip select
– Programmable transfer delays between consecutive transfers and between clock
and data per chip select
– Programmable delay between consecutive transfers
– Selectable mode fault detection
Very fast transfers supported
– Transfers with baud rates up to MCK
– The chip select line may be left active to speed up transfers on the same device
10.4.2
Two-wire Interface
Compatibility with standard two-wire serial memory
One, two or three bytes for slave address
Sequential read/write operations
Supports either master or slave modes
Compatible with standard two-wire serial memories
Master, multi-master and slave mode operation
Bit rate: up to 400 Kbits
General Call supported in slave mode
Connection to Peripheral DMA Controller (PDC) capabilities optimizes data transfers in
master mode only
– One channel for the receiver, one channel for the transmitter
– Next buffer support
10.4.3
USART
Programmable Baud Rate Generator
5- to 9-bit full-duplex synchronous or asynchronous serial communications
– 1, 1.5 or 2 stop bits in Asynchronous Mode or 1 or 2 stop bits in Synchronous Mode
– Parity generation and error detection
– Framing error detection, overrun error detection
– MSB- or LSB-first
– Optional break generation and detection
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