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6242E–ATARM–11-Sep09
AT91SAM9261S
Table of Contents
Features ..................................................................................................... 1
1
Description ............................................................................................... 3
2
Block Diagram .......................................................................................... 4
3
Signal Description .................................................................................. 5
4
Package and Pinout ................................................................................. 9
4.1
217-ball LFBGA Package Outline ......................................................................9
4.2
Pinout .............................................................................................................10
5
Power Considerations ........................................................................... 11
5.1
Power Supplies ................................................................................................11
5.2
Power Consumption ........................................................................................11
6
I/O Line Considerations ......................................................................... 11
6.1
JTAG Port Pins ................................................................................................11
6.2
Test Pin ...........................................................................................................12
6.3
Reset Pin .........................................................................................................12
6.4
PIO Controller A, B and C Lines ......................................................................12
6.5
Shutdown Logic Pins .......................................................................................12
7
Processor and Architecture .................................................................. 13
7.1
ARM926EJ-S Processor ..................................................................................13
7.2
Debug and Test Features ................................................................................14
7.3
Bus Matrix ........................................................................................................14
7.4
Peripheral DMA Controller ...............................................................................14
8
Memories ................................................................................................ 15
8.1
Embedded Memories ......................................................................................16
8.2
External Memories ...........................................................................................18
9
System Controller .................................................................................. 19
9.1
Block Diagram .................................................................................................20
9.2
Reset Controller ...............................................................................................21
9.3
Shutdown Controller ........................................................................................21
9.4
General-purpose Backup Registers ................................................................21
9.5
Clock Generator ..............................................................................................21
9.6
Power Management Controller ........................................................................22