參數(shù)資料
型號: AT91SAM9260B-CU-100
廠商: Atmel
文件頁數(shù): 29/45頁
文件大?。?/td> 0K
描述: IC MCU ARM9 217LFBGA
標準包裝: 126
系列: AT91SAM
核心處理器: ARM9
芯體尺寸: 16/32-位
速度: 180MHz
連通性: EBI/EMI,以太網,I²C,MMC,SPI,SSC,UART/USART,USB
外圍設備: POR,WDT
輸入/輸出數(shù): 96
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: ROM
RAM 容量: 24K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉換器: A/D 4x10b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 217-LFBGA
包裝: 托盤
35
SAM9260 [SUMMARY]
6221LS–ATARM–15-Oct-12
Thus, programming the USART1, USART2 or the USART3 in Modem Mode may lead to unpredictable results. In these
USARTs, the commands relating to the Modem Mode have no effect and the status bits relating the status of the modem
signals are never activated.
10.4.4 Serial Synchronous Controller
Provides serial synchronous communication links used in audio and telecom applications (with CODECs in Master
or Slave Modes, I2S, TDM Buses, Magnetic Card Reader, etc.)
Contains an independent receiver and transmitter and a common clock divider
Offers a configurable frame sync and data length
Receiver and transmitter can be programmed to start automatically or on detection of different event on the frame
sync signal
Receiver and transmitter include a data signal, a clock signal and a frame synchronization signal
10.4.5 Timer Counter
Two blocks of three 16-bit Timer Counter channels
Each channel can be individually programmed to perform a wide range of functions including:
Frequency Measurement
Event Counting
Interval Measurement
Pulse Generation
Delay Timing
Pulse Width Modulation
Up/down Capabilities
Each channel is user-configurable and contains:
Three external clock inputs
Five internal clock inputs
Two multi-purpose input/output signals
Each block contains two global registers that act on all three TC Channels
Note:
TC Block 0 (TC0, TC1, TC2) and TC Block 1 (TC3, TC4, TC5) have identical user interfaces. See Figure 8-1,
“SAM9260 Memory Mapping,” on page 19 for TC Block 0 and TC Block 1 base addresses.
10.4.6 Multimedia Card Interface
One double-channel MultiMedia Card Interface
Compatibility with MultiMedia Card Specification Version 3.11
Compatibility with SD Memory Card Specification Version 1.1
Compatibility with SDIO Specification Version V1.0.
Card clock rate up to Master Clock divided by 2
Embedded power management to slow down clock rate when not used
MCI has two slots, each supporting
One slot for one MultiMediaCard bus (up to 30 cards) or
One SD Memory Card
Support for stream, block and multi-block data read and write
10.4.7 USB Host Port
Compliance with Open HCI Rev 1.0 Specification
Compliance with USB V2.0 Full-speed and Low-speed Specification
Supports both Low-Speed 1.5 Mbps and Full-speed 12 Mbps devices
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