參數(shù)資料
型號(hào): AT91SAM7A3-AU
廠商: Atmel
文件頁數(shù): 1/39頁
文件大?。?/td> 0K
描述: IC ARM7 MCU FLASH 256K 100LQFP
產(chǎn)品培訓(xùn)模塊: SAM9 MPU Boot Solutions & Application Deployment
MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 90
系列: AT91SAM
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 60MHz
連通性: CAN,I²C,MMC,SPI,SSC,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 62
程序存儲(chǔ)器容量: 256KB(256K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
配用: AT91SAM-ICE-ND - EMULATOR FOR AT91 ARM7/ARM9
AT91SAM7A3-EK-ND - KIT EVAL FOR AT91SAM7A3
Features
Incorporates the ARM7TDMI ARM Thumb Processor
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
EmbeddedICE In-circuit Emulation, Debug Communication Channel Support
256 Kbytes of Internal High-speed Flash, Organized in 1024 Pages of 256 Bytes
– Single Cycle Access at Up to 30 MHz in Worst Case Conditions
– Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
– Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms
– 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities
32K Bytes of Internal High-speed SRAM, Single-cycle Access at Maximum Speed
Memory Controller (MC)
– Embedded Flash Controller, Abort Status and Misalignment Detection
– Memory Protection Unit
Reset Controller (RSTC)
– Based on Three Power-on Reset Cells
– Provides External Reset Signal Shaping and Reset Sources Status
Clock Generator (CKGR)
– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL
Power Management Controller (PMC)
– Power Optimization Capabilities, including Slow Clock Mode (Down to 500 Hz), Idle
Mode, Standby Mode and Backup Mode
– Four Programmable External Clock Signals
Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Four External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt
Protected
Debug Unit (DBGU)
– 2-wire UART and Support for Debug Communication Channel interrupt
Periodic Interval Timer (PIT)
– 20-bit Programmable Counter plus 12-bit Interval Counter
Windowed Watchdog (WDT)
– 12-bit key-protected Programmable Counter
– Provides Reset or Interrupt Signal to the System
– Counter May Be Stopped While the Processor is in Debug Mode or in Idle State
Real-time Timer (RTT)
– 32-bit Free-running Counter with Alarm
– Runs Off the Internal RC Oscillator
Two Parallel Input/Output Controllers (PIO)
– Sixty-two Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up resistor and Synchronous Output
Shutdown Controller (SHDWC)
– Programmable Shutdown Pin and Wake-up Circuitry
Two 32-bit Battery Backup Registers for a Total of 8 Bytes
One 8-channel 20-bit PWM Controller (PWMC)
One USB 2.0 Full Speed (12 Mbits per Second) Device Port
– On-chip Transceiver, 2376-byte Configurable Integrated FIFOs
Product
Description
AT91SAM7A3
Preliminary
Summary
6042DS–ATARM–14-Dec-06
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