參數(shù)資料
型號: AT91RM9200-QI-002
廠商: Atmel
文件頁數(shù): 13/41頁
文件大小: 0K
描述: IC ARM9 MCU 208 PQFP
標準包裝: 24
系列: AT91
核心處理器: ARM9
芯體尺寸: 16/32-位
速度: 180MHz
連通性: EBI/EMI,以太網(wǎng),I²C,MMC,SPI,SSC,UART/USART,USB
外圍設(shè)備: POR
輸入/輸出數(shù): 122
程序存儲器容量: 128KB(128K x 8)
程序存儲器類型: ROM
RAM 容量: 48K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 208-MQFP,208-PQFP
包裝: 托盤
20
1768MS–ATARM–09-Jul-09
AT91RM9200
– the Master Clock MCK
– the USB Clocks, UHPCK and UDPCK, respectively for the USB Host Port and the
USB Device Port
– Programmable automatic PLL switch-off in USB Device suspend conditions
– up to thirty peripheral clocks
– four programmable clock outputs PCK0 to PCK3
Four operating modes:
– Normal Mode, Idle Mode, Slow Clock Mode, Standby Mode
9.4
Debug Unit
System peripheral to facilitate debug of Atmel’s ARM-based systems
Composed of the following functions
–Two-pin UART
– Debug Communication Channel (DCC) support
– Chip ID Registers
Two-pin UART
– Implemented features are 100% compatible with the standard Atmel USART
– Independent receiver and transmitter with a common programmable Baud Rate
Generator
– Even, Odd, Mark or Space Parity Generation
– Parity, Framing and Overrun Error Detection
– Automatic Echo, Local Loopback and Remote Loopback Channel Modes
– Interrupt generation
– Support for two PDC channels with connection to receiver and transmitter
Debug Communication Channel Support
– Offers visibility of COMMRX and COMMTX signals from the ARM Processor
– Interrupt generation
Chip ID Registers
– Identification of the device revision, sizes of the embedded memories, set of
peripherals
9.5
PIO Controller
Up to 32 programmable I/O Lines
Fully programmable through Set/Clear Registers
Multiplexing of two peripheral functions per I/O Line
For each I/O Line (whether assigned to a peripheral or used as general purpose I/O)
– Input change interrupt
– Glitch filter
– Multi-drive option enables driving in open drain
– Programmable pull up on each I/O line
– Pin data status register, supplies visibility of the level on the pin at any time
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