參數(shù)資料
型號(hào): AT90USB1287-16AUR
廠商: Atmel
文件頁(yè)數(shù): 73/106頁(yè)
文件大?。?/td> 0K
描述: IC MCU AVR 128K ISP USB TQFP64
產(chǎn)品培訓(xùn)模塊: megaAVR Introduction
標(biāo)準(zhǔn)包裝: 1,000
系列: AVR® 90USB
核心處理器: AVR
芯體尺寸: 8-位
速度: 16MHz
連通性: EBI/EMI,I²C,SPI,UART/USART,USB,USB OTG
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 48
程序存儲(chǔ)器容量: 128KB(128K x 8)
程序存儲(chǔ)器類(lèi)型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-LQFP
包裝: 帶卷 (TR)
配用: ATSTK600-ND - DEV KIT FOR AVR/AVR32
ATSTK525-ND - KIT STARTER FOR AT90USB
AT90USBKEY2-ND - KIT DEMO FOR AT90USB
69
7593L–AVR–09/12
AT90USB64/128
Notes:
1. When the BOOTRST Fuse is programmed, the device will jump to the Boot Loader address at
2. When the IVSEL bit in MCUCR is set, Interrupt Vectors will be moved to the start of the Boot
Flash Section. The address of each Interrupt Vector will then be the address in this table
added to the start address of the Boot Flash Section.
Table 10-2 shows reset and Interrupt Vectors placement for the various combinations of
BOOTRST and IVSEL settings. If the program never enables an interrupt source, the Interrupt
Vectors are not used, and regular program code can be placed at these locations. This is also
the case if the Reset Vector is in the Application section while the Interrupt Vectors are in the
Boot section or vice versa.
Note:
1. The Boot Reset Address is shown in Table 29-8 on page 357. For the BOOTRST Fuse “1”
means unprogrammed while “0” means programmed.
10.1.1
Moving interrupts between application and boot space
The General Interrupt Control Register controls the placement of the Interrupt Vector table.
10.1.2
MCUCR – MCU Control Register
Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash
memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot
30
$003A
ADC
ADC Conversion Complete
31
$003C
EE READY
EEPROM Ready
32
$003E
TIMER3 CAPT
Timer/Counter3 Capture Event
33
$0040
TIMER3 COMPA
Timer/Counter3 Compare Match A
34
$0042
TIMER3 COMPB
Timer/Counter3 Compare Match B
35
$0044
TIMER3 COMPC
Timer/Counter3 Compare Match C
36
$0046
TIMER3 OVF
Timer/Counter3 Overflow
37
$0048
TWI
2-wire Serial Interface
38
$004A
SPM READY
Store Program Memory Ready
Table 10-2.
Reset and interrupt vectors placement
BOOTRST
IVSEL
Reset address
Interrupt vectors start address
1
0
0x0000
0x0002
1
0x0000
Boot Reset Address + 0x0002
0
Boot Reset Address
0x0002
0
1
Boot Reset Address
Boot Reset Address + 0x0002
Table 10-1.
Reset and interrupt vectors. (Continued)
Vector
no.
Program
address (2)
Source
Interrupt definition
Bit
7
65
43
21
0
JTD
PUD
IVSEL
IVCE
MCUCR
Read/write
R/W
R
RR/W
RR
R/W
Initial value
00
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