參數(shù)資料
型號: AT90CAN128-16MU
廠商: Atmel
文件頁數(shù): 16/17頁
文件大小: 0K
描述: IC MCU AVR 128K FLASH 64-QFN
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 1,300
系列: AVR® 90CAN
核心處理器: AVR
芯體尺寸: 8-位
速度: 16MHz
連通性: CAN,EBI/EMI,I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 53
程序存儲器容量: 128KB(128K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-VFQFN 裸露焊盤
包裝: 托盤
產(chǎn)品目錄頁面: 612 (CN2011-ZH PDF)
配用: ATSTK600-TQFP64-ND - STK600 SOCKET/ADAPTER 64-TQFP
ATDVK90CAN1-ND - KIT DEV FOR AT90CAN128 MCU
8
7679HS–CAN–08/08
AT90CAN32/64/128
Port F also serves as an 8-bit bi-directional I/O port, if the A/D Converter is not used. Port pins
can provide internal pull-up resistors (selected for each bit). The Port F output buffers have sym-
metrical drive characteristics with both high sink and source capability. As inputs, Port F pins
that are externally pulled low will source current if the pull-up resistors are activated. The Port F
pins are tri-stated when a reset condition becomes active, even if the clock is not running.
Port F also serves the functions of the JTAG interface. If the JTAG interface is enabled, the pull-
up resistors on pins PF7(TDI), PF5(TMS), and PF4(TCK) will be activated even if a reset occurs.
1.6.9
Port G (PG4..PG0)
Port G is a 5-bit I/O port with internal pull-up resistors (selected for each bit). The Port G output
buffers have symmetrical drive characteristics with both high sink and source capability. As
inputs, Port G pins that are externally pulled low will source current if the pull-up resistors are
activated. The Port G pins are tri-stated when a reset condition becomes active, even if the clock
is not running.
Port G also serves the functions of various special features of the AT90CAN32/64/128 as listed
1.6.10
RESET
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset. The minimum pulse length is given in characteristics. Shorter pulses are not guaranteed
to generate a reset. The I/O ports of the AVR are immediately reset to their initial state even if
the clock is not running. The clock is needed to reset the rest of the AT90CAN32/64/128.
1.6.11
XTAL1
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
1.6.12
XTAL2
Output from the inverting Oscillator amplifier.
1.6.13
AVCC
AVCC is the supply voltage pin for the A/D Converter on Port F. It should be externally con-
nected to V
CC, even if the ADC is not used. If the ADC is used, it should be connected to VCC
through a low-pass filter.
1.6.14
AREF
This is the analog reference pin for the A/D Converter.
2.
About Code Examples
This documentation contains simple code examples that briefly show how to use various parts of
the device. These code examples assume that the part specific header file is included before
compilation. Be aware that not all C compiler vendors include bit definitions in the header files
and interrupt handling in C is compiler dependent. Please confirm with the C compiler documen-
tation for more details.
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