參數(shù)資料
型號: AT89S8253-24AU
廠商: Atmel
文件頁數(shù): 18/60頁
文件大?。?/td> 0K
描述: IC MCU 12K FLASH 24MHZ 44-TQFP
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標準包裝: 160
系列: 89S
核心處理器: 8051
芯體尺寸: 8-位
速度: 24MHz
連通性: SPI,UART/USART
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 12KB(12K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
產(chǎn)品目錄頁面: 616 (CN2011-ZH PDF)
25
3286P–MICRO–3/10
AT89S8253
Notes:
1. Set up the clock mode before enabling the SPI: set all bits needed in SPCR except the SPE bit, then set SPE.
2. Enable the master SPI prior to the slave device.
3. Slave echoes master on next Tx if not loaded with new data.
Table 14-1.
SPCR – SPI Control Register
SPCR Address = D5H
Reset Value = 0000 0100B
Not Bit Addressable
SPIE
SPE
DORD
MSTR
CPOL
CPHA
SPR1
SPR0
Bit
7
6
5432
10
Symbol
Function
SPIE
SPI interrupt enable. This bit, in conjunction with the ES bit in the IE register, enables SPI interrupts: SPIE = 1 and ES = 1
enable SPI interrupts. SPIE = 0 disables SPI interrupts.
SPE
SPI enable. SPI = 1 enables the SPI channel and connects SS, MOSI, MISO and SCK to pins P1.4, P1.5, P1.6, and P1.7.
SPI = 0 disables the SPI channel.
DORD
Data order. DORD = 1 selects LSB first data transmission. DORD = 0 selects MSB first data transmission.
MSTR
Master/slave select. MSTR = 1 selects Master SPI mode. MSTR = 0 selects slave SPI mode.
CPOL
Clock polarity. When CPOL = 1, SCK is high when idle. When CPOL = 0, SCK of the master device is low when not
transmitting. Please refer to figure on SPI clock phase and polarity control.
CPHA
Clock phase. The CPHA bit together with the CPOL bit controls the clock and data relationship between master and slave.
Please refer to figure on SPI clock phase and polarity control.
SPR0
SPR1
SPI clock rate select. These two bits control the SCK rate of the device configured as master. SPR1 and SPR0 have no
effect on the slave. The relationship between SCK and the oscillator frequency, F
OSC., is as follows:
SPR1SPR0SCK
00f/4 (f/2 in x2 mode)
01f/16 (f/8 in x2 mode)
10f/64 (f/32 in x2 mode)
11f/128 (f/64 in x2 mode)
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