參數資料
型號: AT89LP52-20MU
廠商: Atmel
文件頁數: 102/117頁
文件大?。?/td> 0K
描述: IC MCU 8051 8K FLASH SPI 44VQFN
標準包裝: 360
系列: 89LP
核心處理器: 8051
芯體尺寸: 8-位
速度: 20MHz
連通性: EBI/EMI,I²C,SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數: 36
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 5.5 V
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-VFQFN 裸露焊盤
包裝: 托盤
85
3709D–MICRO–12/11
AT89LP51/52
7. Atmel Signature Bytes:
8. Symbol Key:
17.4
Status Register
The current state of the memory may be accessed by reading the status register. The status reg-
ister is shown in Table 17-3.
17.5
DATA Polling
The AT89LP51/52 implements DATA polling to indicate the end of a programming cycle. While
the device is busy, any attempted read of the last byte written will return the data byte with the
MSB complemented. Once the programming cycle has completed, the true value will be acces-
sible. During Erase the data is assumed to be FFH and DATA polling will return 7FH. When
writing multiple bytes in a page, the DATA value will be the last data byte loaded before pro-
gramming begins, not the written byte with the highest physical address within the page.
17.6
Flash Security
The AT89LP51/52 provides three Lock Bits for Flash Code and Data Memory security. Lock bits
can be left unprogrammed (FFh) or programmed (00h) to obtain the protection levels listed in
Table 17-4. Lock bits can only be erased (set to FFh) by Chip Erase. Lock bit mode 2 disables
programming of all memory spaces, including the User Signature Array and User Configuration
Fuses. User fuses must be programmed before enabling Lock bit mode 2 or 3. Lock bit mode 3
Address:
0000H
0001H
0002H
AT89LP51:
1EH
54H
05H
AT89LP52:
1EH
54H
06H
a:Page Address Bit
s:Half Page Select Bit
b:
Byte Address Bit
x:
Don’t Care Bit
Table 17-3.
Status
Register
––
LOAD
SUCCESS
WRTINH
BUSY
Bit
7
6
543
21
0
Symbol
Function
LOAD
Load flag. Cleared low by the load page buffer command and set high by the next memory write. This flag signals that
the page buffer was previously loaded with data by the load page buffer command.
SUCCESS
Success flag. Cleared low at the start of a programming cycle and will only be set high if the programming cycle
completes without interruption from the brownout detector.
WRTINH
Write Inhibit flag. Cleared low by the brownout detector (BOD) whenever programming is inhibited due to V
DD falling
below the minimum required programming voltage. If a BOD episode occurs during programming, the SUCCESS flag
will remain low after the cycle is complete.
BUSY
Busy flag. Cleared low whenever the memory is busy programming or if write is currently inhibited.
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AT89LP52-20PU 功能描述:8位微控制器 -MCU Single-Cycle 8051 8K ISP Flash MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
AT89LP6440-20AU 功能描述:8位微控制器 -MCU Single-Cycle 8051 64K ISP Flash RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
AT89LP6440-20JU 功能描述:8位微控制器 -MCU Single-Cycle 8051 64K ISP Flash RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
AT89LP6440-20MU 功能描述:8位微控制器 -MCU Single-Cycle 8051 64K ISP Flash RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
AT89LP6440-20PU 功能描述:8位微控制器 -MCU Single-Cycle 8051 64K ISP Flash RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT