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參數(shù)資料
| 型號(hào)： | AT89LP51-20AU |
| 廠商： | Atmel |
| 文件頁(yè)數(shù)： | 71/117頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | MCU 8051 4K FLASH 20MHZ |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 系列： | 89LP |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 連通性： | EBI/EMI，I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 36 |
| 程序存儲(chǔ)器容量： | 4KB（4K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 256 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.4 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-TQFP |
| 包裝： | 托盤 |
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3709D–MICRO–12/11
AT89LP51/52
13. External Interrupts
The INT0 (P3.2) and INT1 (P3.3) pins of the AT89LP51/52 may be used as external interrupt
sources. The external interrupts can be programmed to be level-activated or transition-activated
by setting or clearing bit IT1 or IT0 in Register TCON. If ITx = 0, external interrupt x is triggered
by a detected low at the INTx pin. If ITx = 1, external interrupt x is edge-triggered. In this mode if
successive samples of the INTx pin show a high in one cycle and a low in the next cycle, inter-
rupt request flag IEx in TCON is set. Flag bit IEx then requests the interrupt. Since the external
interrupt pins are sampled once each clock cycle, an input high or low should hold for at least 2
system periods to ensure sampling. If the external interrupt is transition-activated, the external
source has to hold the request pin high for at least two clock cycles, and then hold it low for at
least two clock cycles to ensure that the transition is seen so that interrupt request flag IEx will
be set. IEx will be automatically cleared by the CPU when the service routine is called if gener-
ated in edge-triggered mode. If the external interrupt is level-activated, the external source has
to hold the request active until the requested interrupt is actually generated. Then the external
source must deactivate the request before the interrupt service routine is completed, or else
another interrupt will be generated. Both INT0 and INT1 may wake up the device from the
Power-down state.
14. Serial Interface (UART)
The seria l interface on the AT 89 L P51 /5 2 im p lem en ts a Universal Asynchronous
Receiver/Transmitter (UART). The UART has the following features:
Full-duplex Operation
8 or 9 Data Bits
Framing Error Detection
Multiprocessor Communication Mode with Automatic Address Recognition
Baud Rate Generator Using Timer 1 or Timer 2
Interrupt on Receive Buffer Full or Transmission Complete
Synchronous SPI or TWI Master Emulation
The serial interface is full-duplex, which means it can transmit and receive simultaneously. It is
also receive-buffered, which means it can begin receiving a second byte before a previously
received byte has been read from the receive register. (However, if the first byte still has not
been read when reception of the second byte is complete, one of the bytes will be lost.) The
serial port receive and transmit registers are both accessed at the Special Function Register
SBUF. Writing to SBUF loads the transmit register, and reading SBUF accesses a physically
separate receive register. The serial port can operate in the following four modes.
Mode 0: Serial data enters and exits through RXD. TXD outputs the shift clock. Eight data
bits are transmitted/received, with the LSB first. The baud rate is programmable to 1/6 or 1/3
the system frequency in Compatibility mode, 1/4 or 1/2 the system frequency in Fast mode,
or variable based on Time 1.
Mode 1: 10 bits are transmitted (through TXD) or received (through RXD): a start bit (0),
8 data bits (LSB first), and a stop bit (1). On receive, the stop bit goes into RB8 in the Special
Function Register SCON. The baud rate is variable based on Timer 1 or Timer 2.
Mode 2: 11 bits are transmitted (through TXD) or received (through RXD): a start bit (0),
8 data bits (LSB first), a programmable 9th data bit, and a stop bit (1). On transmit, the 9th
data bit (TB8 in SCON) can be assigned the value of “0” or “1”. For example, the parity bit
(P, in the PSW) can be moved into TB8. On receive, the 9th data bit goes into RB8 in the
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| AT89LP51-20JU | 功能描述:8位微控制器 -MCU Single Cycle 8051 4K ISP FL RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| AT89LP51-20MU | 功能描述:8位微控制器 -MCU Single Cycle 8051 4K ISP FL RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| AT89LP51-20PU | 功能描述:8位微控制器 -MCU Single Cycle 8051 4K ISP FL RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| AT89LP51ED2-20AAU | 功能描述:8位微控制器 -MCU 64KB 20MHz 2.4V-5.5V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| AT89LP51ED2-20AU | 功能描述:8位微控制器 -MCU 64KB 20MHz 2.4V-5.5V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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