參數(shù)資料
型號: AT89C51IC2-SLRUL
廠商: Atmel
文件頁數(shù): 96/140頁
文件大小: 0K
描述: IC 8051 MCU 32K FLASH 44-PLCC
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 500
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 34
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 1.25K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 標(biāo)準(zhǔn)包裝
配用: AT89OCD-01-ND - USB EMULATOR FOR AT8XC51 MCU
其它名稱: AT89C51IC2-SLRULDKR
59
AT89C51IC2
4301D–8051–02/08
Registers
The PCA interrupt vector is located at address 0033H, the SPI interrupt vector is located
at address 0043H, the I2C interrupt vector at 0043H and Keyboard interrupt vector is
located at address 003BH. All other vectors addresses are the same as standard C52
devices.
Table 47. Priority Level Bit Values
A low-priority interrupt can be interrupted by a high priority interrupt, but not by another
low-priority interrupt. A high-priority interrupt can’t be interrupted by any other interrupt
source.
If two interrupt requests of different priority levels are received simultaneously, the
request of higher priority level is serviced. If interrupt requests of the same priority level
are received simultaneously, an internal polling sequence determines which request is
serviced. Thus within each priority level there is a second priority structure determined
by the polling sequence.
IPH.x
IPL.x
Interrupt Level Priority
0
0 (Lowest)
0
1
0
2
1
3 (Highest)
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