參數(shù)資料
型號： AT75C
英文描述： AT75C DSP Subsystem [Updated . 171 Pages] The AT75C DSP subsystem is a fully autonomous DSP-based computation block. It is built around a 16-bit. fixed-point. industry standard OakDSPCore. Additionally. the DSP subsystem embeds all elements necessary to run complex DSP algorithms independently.
中文描述： AT75C DSP子系統(tǒng)[更新。 171頁]的AT75C DSP子系統(tǒng)是一個完全獨立的基于DSP的計算塊。這是圍繞一個16位。定點。行業(yè)標準OakDSPCore。此外。嵌入了DSP子系統(tǒng)的所有元素需要運行復雜的DSP算法獨立。
文件頁數(shù)： 2/171頁
文件大?。?/td> 1288K
代理商： AT75C
10
AT75C DSP Subsystem
1368C–INTAP–08/02
In addition to the conditional shifting operations performed when the accumulators are
shifted according to the SV register (by +36, -36), the shift and rotate operations
included in the MODA and MODB instructions are also performed conditionally. MODA
and MODB include:
1-bit right and left arithmetic shift and rotate
4-bit right and left arithmetic shift
For details, refer to MODA and MODB instructions in “Instruction Set” on page 31.
Arithmetic left shift and logical left shift perform the same operation, filling the LSBs with
zeros. During an arithmetic right shift, the MSBs are sign extended and during a logical
right shift, the MSBs are filled with zeros. Whether the shift mode is arithmetic or logic is
determined according to the Status mode bit (S) in the register ST2. It affects all shift
instructions.
Figure 4. Arithmetic Shift Right
Figure 5. Logical Shift Right
Figure 6. Logical Shift Left
Move and Shift Operations
The four accumulators can be loaded by a shifted value, according to the SV register
content, in a single cycle. The accumulators can be loaded from one of the registers or
from a data memory location, addressed in direct addressing mode or indirect address-
ing mode, according to the SV shift value. The shifting capability is +36, -36, (shift left is
a positive number, while shift right is a negative number). The accumulators can also be
loaded by one of the DAAU registers (Rn registers), shifted according to a constant
embedded in the instruction opcode. The shifting capability in this case is 15 to -16.
Whether arithmetic shift mode or logic shift mode is selected is determined by the Status
mode bit (S) in the register ST2. Refer to MOVS and MOVSI instructions in “Instruction
The register content or a data memory location content can be moved and shifted
according to the SV shift value into one of the four accumulators in a single cycle. One
of the four accumulators can also be loaded by a shifted value of the DAAU registers
(Rn registers), according to a constant embedded in the instruction opcode, also in a
single cycle. The shifting capability in this case is 16 to -15. Refer to “Instruction Set” on
page 31 for MOVS and MOVSI instructions.
Exponent Unit
The exponent unit (EXP) performs exponent evaluation of one of the four accumulators,
of a data memory location or of one of the registers. The result of this operation is a
signed 6-bit value sign-extended into 16 bits and transferred into the shift value register
(SV). Optionally, it can also be transferred, sign-extended into 36 bits, into one of the
Ax-accumulators. The source operand is unaffected by this calculation. The source
C
Extension
Accumulator high
Accumulator low
C
Extension
Accumulator high
Accumulator low
0
C
0
Extension
Accumulator high
Accumulator low
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