參數(shù)資料
型號(hào)： AT6010H-4QI
廠商： Atmel
文件頁(yè)數(shù)： 1/28頁(yè)
文件大小： 0K
描述： IC FPGA 4NS 240PQFP
標(biāo)準(zhǔn)包裝： 24
系列： AT6000(LV)
邏輯元件/單元數(shù)： 6400
輸入/輸出數(shù)： 204
門(mén)數(shù)： 30000
電源電壓： 4.5 V ~ 5.5 V
安裝類(lèi)型： 表面貼裝
工作溫度： -40°C ~ 85°C
封裝/外殼： 240-BFQFP
供應(yīng)商設(shè)備封裝： 240-PQFP（32x32）
其它名稱(chēng)： AT6010H4QI
1
Features
High-performance
– System Speeds > 100 MHz
– Flip-flop Toggle Rates > 250 MHz
– 1.2 ns/1.5 ns Input Delay
– 3.0 ns/6.0 ns Output Delay
Up to 204 User I/Os
Thousands of Registers
Cache Logic Design
– Complete/Partial In-System Reconfiguration
– No Loss of Data or Machine State
– Adaptive Hardware
Low Voltage and Standard Voltage Operation
– 5.0 (VCC = 4.75V to 5.25V)
– 3.3 (V
CC = 3.0V to 3.6V)
Automatic Component Generators
– Reusable Custom Hard Macro Functions
Very Low-power Consumption
– Standby Current of 500 A/ 200 A
– Typical Operating Current of 15 to 170 mA
Programmable Clock Options
– Independently Controlled Column Clocks
– Independently Controlled Column Resets
– Clock Skew Less Than 1 ns Across Chip
Independently Configurable I/O (PCI Compatible)
– TTL/CMOS Input Thresholds
– Open Collector/Tristate Outputs
– Programmable Slew-rate Control
– I/O Drive of 16 mA (combinable to 64 mA)
Easy Migration to Atmel Gate Arrays for High Volume Production
Description
AT6000 Series SRAM-based Field Programmable Gate Arrays (FPGAs) are ideal for
use as reconfigurable coprocessors and implementing compute-intensive logic.
Supporting system speeds greater than 100 MHz and using a typical operating current
of 15 to 170 mA, AT6000 Series devices are ideal for high-speed, compute-intensive
designs. These FPGAs are designed to implement Cache Logic, which provides the
user with the ability to implement adaptive hardware and perform hardware
acceleration.
The patented AT6000 Series architecture employs a symmetrical grid of small yet
powerful cells connected to a flexible busing network. Independently controlled clocks
and resets govern every column of cells. The array is surrounded by programmable
I/O.
AT6000 Series Field Programmable Gate Arrays
Device
AT6002
AT6003
AT6005
AT6010
Usable Gates
6,000
9,000
15,000
30,000
Cells
1,024
1,600
3,136
6,400
Registers (maximum)
1,024
1,600
3,136
6,400
I/O (maximum)
96
120
108
204
Typ. Operating Current (mA)
15 - 30
25 - 45
40 - 80
85 - 170
Cell Rows x Columns
32 x 32
40 x 40
56 x 56
80 x 80
Rev. 0264F–10/99
Coprocessor
Field
Programmable
Gate Arrays
AT6000(LV)
Series
(continued)
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