參數(shù)資料
型號: AT49SN6416(T)
英文描述: AT49SN6416(T)/3208(T) Advance Information [Updated 3/02. 38 Pages] 64M bit and 32M. 1.8-Volt Burst and Page Mode Flash Memory
中文描述: AT49SN6416(翻譯)/ 3208(T)的預(yù)先信息[更新時間3月2日。 38頁] 6400位和32M的。 1.8伏突發(fā)和頁面模式閃存
文件頁數(shù): 1/38頁
文件大小: 708K
代理商: AT49SN6416(T)
1
Features
64-megabit (4M x 16) and 32-megabit (2M x 16) Flash Memories
1.65V - 1.95V Read/Write
High Performance
– Random Access Time – 90 ns
– Page Mode Read Time – 20 ns
– Synchronous Burst Frequency – 54 MHz
– Configurable Burst Operation
Sector Erase Architecture
– Eight 4K Word Sectors with Individual Write Lockout
– 32K Word Main Sectors with Individual Write Lockout
Typical Sector Erase Time: 32K Word Sectors – 500 ms; 4K Word Sectors – 100 ms
32M, Dual Plane Organization, Permitting Concurrent Read while Program/Erase
– Memory Plane A: 25% of Memory Including Eight 4K Word Sectors
– Memory Plane B: 75% of Memory Consisting of 32K Word Sectors
64M, Four Plane Organization, Permitting Concurrent Read in Any of the Three
Planes not Being Programmed/Erased
– Memory Plane A: 25% of Memory Including Eight 4K Word Sectors
– Memory Plane B: 25% of Memory Consisting of 32K Word Sectors
– Memory Plane C: 25% of Memory Consisting of 32K Word Sectors
– Memory Plane D: 25% of Memory Consisting of 32K Word Sectors
Suspend/Resume Feature for Erase and Program
– Supports Reading and Programming Data from Any Sector by Suspending Erase
of a Different Sector
– Supports Reading Any Word by Suspending Programming of Any Other Word
Low-power Operation
– 30 mA Active
– 10 μA Standby
Data Polling and Toggle Bit for End of Program Detection
VPP Pin for Write Protection and Accelerated Program/Erase Operations
RESET Input for Device Initialization
CBGA Package
Top or Bottom Boot Block Configuration Available
128-bit Protection Register
Common Flash Interface (CFI)
Description
The AT49SN6416(T) and AT49SN3208(T) are 1.8-volt 64-megabit and 32-megabit
Flash memories respectively. The memories are divided into multiple sectors and
planes for erase operations. The devices can be read or reprogrammed off a single
1.8V power supply, making them ideally suited for in-system programming. The
devices can be configured to operate in the asynchronous/page read (default mode)
or burst read mode. The burst read mode is used to achieve a faster data rate than is
possible in the asynchronous/page read mode. If the AVD and the CLK signals are
both tied to GND, the device will behave like a standard asynchronous Flash memory.
In the page mode, the AVD signal can be tied to GND or can be pulsed low to latch the
page address. In both cases the CLK can be tied to GND.
The AT49SN3208(T) is segmented into two memory planes. Reads from memory
plane B may be performed even while program or erase functions are being executed
in memory plane A and vice versa. The AT49SN6416(T) is divided into four memory
planes. A read operation can occur in any of the three planes which is not being pro-
grammed or erased. This concurrent operation allows improved system performance
by not requiring the system to wait for a program or erase operation to complete
before a read is performed. To further increase the flexibility of the device, it contains
64-megabit
(4M x 16) and
32-megabit
(2M x 16)
Burst/Page
Mode 1.8-volt
Flash Memory
AT49SN6416
AT49SN6416T
AT49SN3208
AT49SN3208T
Advance
Information
Rev. 1605C–FLASH–03/02
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