- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄12018 > AT32UC3C1512C-AUT (Atmel)IC MCU AVR32 512K FLASH 100TQFP PDF資料下載
參數(shù)資料
| 型號： | AT32UC3C1512C-AUT |
| 廠商： | Atmel |
| 文件頁數(shù)： | 10/110頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU AVR32 512K FLASH 100TQFP |
| 產(chǎn)品培訓模塊： | AVR® UC3 Introduction |
| 標準包裝： | 450 |
| 系列： | AVR®32 UC3 C |
| 核心處理器： | AVR |
| 芯體尺寸： | 32-位 |
| 速度： | 66MHz |
| 連通性： | CAN，以太網(wǎng)，I²C，IrDA，LIN，SPI，UART/USART，USB |
| 外圍設備： | 欠壓檢測/復位，DMA，I²S，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 81 |
| 程序存儲器容量： | 512KB（512K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 64K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 5.5 V |
| 數(shù)據(jù)轉換器： | A/D 16x12b，D/A 4x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 100-TQFP |
| 包裝： | 托盤 |
| 配用： | ATSTK600-SC03-ND - STK600 TQFP SOCKET CARD AVR ATSTK600-RC38-ND - STK600 ROUTING CARD AVR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁當前第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁
2011 Microchip Technology Inc.
DS70150E-page 107
dsPIC30F6010A/6015
16.0
SPI MODULE
The Serial Peripheral Interface (SPI) module is a
synchronous serial interface. It is useful for communi-
cating
with
other
peripheral
devices
such
as
EEPROMs, shift registers, display drivers and A/D
converters, or other microcontrollers. It is compatible
with Motorola’s SPI and SIOP interfaces.
16.1
Operating Function Description
Each SPI module consists of a 16-bit shift register,
SPIxSR (where x = 1 or 2), used for shifting data in
and out, and a buffer register, SPIxBUF. A control reg-
ister, SPIxCON, configures the module. Additionally, a
STATUS register, SPIxSTAT, indicates various status
conditions.
The serial interface consists of 4 pins: SDIx (Serial
Data Input), SDOx (Serial Data Output), SCKx (Shift
Clock Input or Output) and SSx (active-low Slave
Select).
In Master mode operation, SCK is a clock output, but
in Slave mode, it is a clock input.
A series of eight or sixteen clock pulses shifts out bits
from the SPIxSR to SDOx pin and simultaneously
shifts in data from SDIx pin. An interrupt is generated
when the transfer is complete and the corresponding
interrupt flag bit (SPI1IF or SPI2IF) is set. This inter-
rupt can be disabled through an interrupt enable bit
(SPI1IE or SPI2IE).
The receive operation is double-buffered. When a
complete byte is received, it is transferred from
SPIxSR to SPIxBUF.
If the receive buffer is full when new data is being
transferred from SPIxSR to SPIxBUF, the module will
set the SPIROV bit, indicating an overflow condition.
The transfer of the data from SPIxSR to SPIxBUF will
not be completed and the new data will be lost. The
module will not respond to SCL transitions while SPI-
ROV is ‘1’, effectively disabling the module until SPIx-
BUF is read by user software.
Transmit writes are also double-buffered. The user
writes to SPIxBUF. When the master or slave transfer
is completed, the contents of the shift register
(SPIxSR) is moved to the receive buffer. If any trans-
mit data has been written to the buffer register, the
contents of the transmit buffer are moved to SPIxSR.
The received data is thus placed in SPIxBUF and the
transmit data in SPIxSR is ready for the next transfer.
In Master mode, the clock is generated by prescaling
the system clock. Data is transmitted as soon as a
value is written to SPIxBUF. The interrupt is generated
at the middle of the transfer of the last bit.
In Slave mode, data is transmitted and received as
external clock pulses appear on SCK. Again, the inter-
rupt is generated when the last bit is latched. If SSx
control is enabled, then transmission and reception
are enabled only when SSx = low. The SDOx output
will be disabled in SSx mode with SSx high.
The clock provided to the module is (FOSC/4). This
clock is then prescaled by the primary (PPRE<1:0>)
and the secondary (SPRE<2:0>) prescale factors. The
CKE bit determines whether transmit occurs on transi-
tion from active clock state to Idle clock state, or vice
versa. The CKP bit selects the Idle state (high or low)
for the clock.
16.1.1
WORD AND BYTE
COMMUNICATION
A control bit, MODE16 (SPIxCON<10>), allows the
module to communicate in either 16-bit or 8-bit mode.
16-bit operation is identical to 8-bit operation, except
that the number of bits transmitted is 16 instead of 8.
The user software must disable the module prior to
changing the MODE16 bit. The SPI module is reset
when the MODE16 bit is changed by the user.
A basic difference between 8-bit and 16-bit operation is
that the data is transmitted out of bit 7 of the SPIxSR for
8-bit operation, and data is transmitted out of bit 15 of
the SPIxSR for 16-bit operation. In both modes, data is
shifted into bit 0 of the SPIxSR.
16.1.2
SDOx DISABLE
A control bit, DISSDO, is provided to the SPIxCON reg-
ister to allow the SDOx output to be disabled. This will
allow the SPI module to be connected in an input only
configuration. SDO can also be used for general
purpose I/O.
Note:
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals,
register
descriptions
and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046).
Note:
The user must perform reads of SPIxBUF
if the module is used in a transmit only
configuration to avoid a receive overflow
condition. (SPIROV = 1)
Note:
Both the transmit buffer (SPIxTXB) and
the receive buffer (SPIxRXB) are mapped
to the same register address, SPIxBUF.
相關PDF資料 |
PDF描述 |
|---|---|
| ATMEGA128-16AU | IC AVR MCU 128K 16MHZ 5V 64TQFP |
| ADUC7122BBCZ | IC ARM7TDMI MCU 126KB 108CSPBGA |
| AT91SAM9261B-CU | MCU ARM9 ULTRA LOW PWR 217-LFBGA |
| VJ1825A183JBAAT4X | CAP CER 0.018UF 50V 5% NP0 1825 |
| ATMEGA128-16MU | IC AVR MCU 128K 16MHZ 5V 64-QFN |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AT32UC3C1512C-AZR | 功能描述:32位微控制器 - MCU 512KB FL,-40/125oC AUTO RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT |
| AT32UC3C1512C-AZT | 功能描述:32位微控制器 - MCU 512KB FL,-40/125oC AUTO RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT |
| AT32UC3C164C-AUR | 功能描述:32位微控制器 - MCU UC3C 64K FLASH 16K SRAM RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT |
| AT32UC3C164C-AUT | 功能描述:32位微控制器 - MCU UC3C 64K FLASH 16K SRAM RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT |
| AT32UC3C2128C-A2UR | 功能描述:32位微控制器 - MCU UC3C 128K FLASH 32K SRAM RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復。