參數(shù)資料
型號(hào): AT32UC3A0128-CTUR
廠商: Atmel
文件頁數(shù): 84/97頁
文件大小: 0K
描述: IC MCU 128KB FLASH 144TFBGA
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
AVR® UC3 Introduction
標(biāo)準(zhǔn)包裝: 1
系列: AVR®32 UC3 A0
核心處理器: AVR
芯體尺寸: 32-位
速度: 66MHz
連通性: EBI/EMI,以太網(wǎng),I²C,SPI,SSC,UART/USART,USB OTG
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 109
程序存儲(chǔ)器容量: 128KB(128K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 144-TFBGA
包裝: 剪切帶 (CT)
其它名稱: AT32UC3A0128-CTURCT
85
AT32UC3A
Fix/workaround
When multiple CS are in use, if one of the baudrate equals 1, the other must also equal 1 if
CPOL=1 and CPHA=0.
15.5.2
PWM
1.
PWM counter restarts at 0x0001
The PWM counter restarts at 0x0001 and not 0x0000 as specified. Because of this the first
PWM period has one more clock cycle.
Fix/Workaround
- The first period is 0x0000, 0x0001, ..., period
- Consecutive periods are 0x0001, 0x0002, ..., period
2.
PWM channel interrupt enabling triggers an interrupt
When enabling a PWM channel that is configured with center aligned period (CALG=1), an
interrupt is signalled.
Fix/Workaround
When using center aligned mode, enable the channel and read the status before channel
interrupt is enabled.
3.
PWM update period to a 0 value does not work
It is impossible to update a period equal to 0 by the using the PWM update register
(PWM_CUPD).
Fix/Workaround
Do not update the PWM_CUPD register with a value equal to 0.
4.
PWM channel status may be wrong if disabled before a period has elapsed
Before a PWM period has elapsed, the read channel status may be wrong. The CHIDx-bit
for a PWM channel in the PWM Enable Register will read '1' for one full PWM period even if
the channel was disabled before the period elapsed. It will then read '0' as expected.
Fix/Workaround
Reading the PWM channel status of a disabled channel is only correct after a PWM period
has elapsed.
15.5.3
SSC
1.
SSC does not trigger RF when data is low
The SSC cannot transmit or receive data when CKS = CKDIV and CKO = none, in TCMR or
RCMR respectively.
Fix/Workaround
Set CKO to a value that is not "none" and bypass the output of the TK/RK pin with the PIO.
2.
SSC Data is not sent unless clock is set as output
The SSC cannot transmit or receive data when CKS = CKDIV and CKO = none, in TCMR or
RCMR respectively.
Fix/Workaround
Set CKO to a value that is not "none" and bypass the output of the TK/RK pin with the PIO.
32058KS–AVR32–01/12
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AT32UC3A0256 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:AVR32 32-Bit Microcontroller
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