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參數(shù)資料
型號: AT32UC3A0128-ALUT
廠商: Atmel
文件頁數(shù): 33/97頁
文件大小: 0K
描述: IC MCU AVR32 128KB FLASH 144LQFP
產(chǎn)品培訓(xùn)模塊: AVR UC3 Audio Application
MCU Product Line Introduction
AVR EVK1105 Digital Audio Gateway Kit
AVR® UC3 Introduction
標(biāo)準(zhǔn)包裝: 300
系列: AVR®32 UC3 A0
核心處理器: AVR
芯體尺寸: 32-位
速度: 66MHz
連通性: EBI/EMI,以太網(wǎng),I²C,SPI,SSC,UART/USART,USB OTG
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 109
程序存儲器容量: 128KB(128K x 8)
程序存儲器類型: 閃存
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 144-LQFP
包裝: 托盤
配用: ATSTK600-RC33-ND - STK600 ROUTING CARD AVR
ATEVK1105-ND - KIT EVAL FOR AT32UC3A0
ATAVRONEKIT-ND - KIT AVR/AVR32 DEBUGGER/PROGRMMR
ATEVK1100-ND - KIT DEV/EVAL FOR AVR32 AT32UC3A
39
AT32UC3A
11. Boot Sequence
This chapter summarizes the boot sequence of the AT32UC3A. The behaviour after power-up is
controlled by the Power Manager. For specific details, refer to Section 13. ”Power Manager
(PM)” on page 53.
11.1
Starting of clocks
After power-up, the device will be held in a reset state by the Power-On Reset circuitry, until the
power has stabilized throughout the device. Once the power has stabilized, the device will use
the internal RC Oscillator as clock source.
On system start-up, the PLLs are disabled. All clocks to all modules are running. No clocks have
a divided frequency, all parts of the system recieves a clock with the same frequency as the
internal RC Oscillator.
11.2
Fetching of initial instructions
After reset has been released, the AVR32 UC CPU starts fetching instructions from the reset
address, which is 0x8000_0000. This address points to the first address in the internal Flash.
The code read from the internal Flash is free to configure the system to use for example the
PLLs, to divide the frequency of the clock routed to some of the peripherals, and to gate the
clocks to unused peripherals.
32058KS–AVR32–01/12
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