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參數(shù)資料
| 型號(hào)： | AT29C040 |
| 廠商： | Atmel Corp. |
| 英文描述： | High Speed CMOS Logic Octal Positive-Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-PDIP -55 to 125 |
| 中文描述： | 4兆位為512k × 8 5伏只有256字節(jié)的扇區(qū)的CMOS閃存 |
| 文件頁(yè)數(shù)： | 7/11頁(yè) |
| 文件大?。?/td> | 234K |
| 代理商： | AT29C040 |
Program Cycle Characteristics
Symbol
Parameter
Min
Max
Units
t
WC
t
AS
t
AH
t
DS
t
DH
t
WP
t
BLC
t
WPH
Write Cycle Time
10
ms
Address Set-up Time
10
ns
Address Hold Time
50
ns
Data Set-up Time
50
ns
Data Hold Time
10
ns
Write Pulse Width
90
ns
μ
s
ns
Byte Load Cycle Time
150
Write Pulse Width High
100
Program Cycle Waveforms
(1, 2, 3)
Notes: 1. A8 through A18 must specify the sector address
during each high to low transition of WE (or CE).
2. OE must be high when WE and CE are both low.
3.
All bytes that are not loaded within the sector being
programmed will be indeterminate.
AT29C040A
7
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AT29C040A-10 | High Speed CMOS Logic Octal Positive-Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-SOIC -55 to 125 |
| AT29C040A-10PC | High Speed CMOS Logic Octal Positive-Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-SOIC -55 to 125 |
| AT29C040A-10PI | High Speed CMOS Logic Octal Positive-Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-SOIC -55 to 125 |
| AT29C040A-10TC | High Speed CMOS Logic Octal Positive-Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-SOIC -55 to 125 |
| AT29C040A-10TI | High Speed CMOS Logic Octal Positive-Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-SOIC -55 to 125 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT29C040-12DC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM |
| AT29C040-12DI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM |
| AT29C040-12PC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM |
| AT29C040-12PI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM |
| AT29C040-12TC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM |
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