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參數(shù)資料
| 型號： | AT28LV64B-25TI |
| 廠商： | ATMEL CORP |
| 元件分類： | DRAM |
| 英文描述： | High Speed CMOS Logic Octal Non-Inverting Buffers and Line Drivers with 3-State Outputs 20-SOIC -55 to 125 |
| 中文描述： | 8K X 8 EEPROM 3V, 250 ns, PDSO28 |
| 封裝： | PLASTIC, TSOP-28 |
| 文件頁數(shù)： | 2/9頁 |
| 文件大小： | 484K |
| 代理商： | AT28LV64B-25TI |
Block Diagram
writing of up to 64-bytes simultaneously. During a write cy-
cle, the addresses and 1 to 64-bytes of data are internally
latched, freeing the address and data bus for other opera-
tions. Following the initiation of a write cycle, the device
will automatically write the latched data using an internal
control timer. The end of a write cycle can be detected by
DATA polling of I/O7. Once the end of a write cycle has
been detected a new access for a read or write can begin.
Atmel’s 28LV64B has additional features to ensure high
quality and manufacturability. The device utilizes internal
error correction for extended endurance and improved
data retention characteristics. A software data protection
mechanism guards against inadvertent writes. The device
also includes an extra 64-bytes of E
2
PROM for device
identification or tracking.
Description
(Continued)
Temperature Under Bias.................-55°C to +125°C
Storage Temperature......................-65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ................... -0.6V to +6.25V
All Output Voltages
with Respect to Ground .............-0.6V to V
CC
+ 0.6V
Voltage on OE and A9
with Respect to Ground ................... -0.6V to +13.5V
*NOTICE: Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indi-
cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Absolute Maximum Ratings*
2-136
AT28LV64B
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