參數(shù)資料
型號(hào): AT28LV64B-25SC
廠商: ATMEL CORP
元件分類: DRAM
英文描述: High Speed CMOS Logic Octal Non-Inverting Buffers and Line Drivers with 3-State Outputs 20-PDIP -55 to 125
中文描述: 8K X 8 EEPROM 3V, 250 ns, PDSO28
封裝: 0.300 INCH, PLASTIC, SOIC-28
文件頁(yè)數(shù): 1/9頁(yè)
文件大?。?/td> 484K
代理商: AT28LV64B-25SC
AT28LV64B
64K (8K x 8)
Low Voltage
CMOS
E
2
PROM with
Page Write and
Software Data
Protection
Features
Single 3.3V
±
10% Supply
3-Volt-Only Read and Write Operation
Software-Protected Programming
Low Power Dissipation
15 mA Active Current
20
μ
A CMOS Standby Current
Fast Read Access Time
200 ns
Automatic Page Write Operation
Internal Address and Data Latches for 64-Bytes
Internal Control Timer
Fast Write Cycle Times
Page Write Cycle Time: 10 ms Maximum
1 to 64-Byte Page Write Operation
DATA Polling for End of Write Detection
High Reliability CMOS Technology
Endurance: 10,000 Cycles
Data Retention: 10 Years
JEDEC Approved Byte-Wide Pinout
Commercial and Industrial Temperature Ranges
Description
The AT28LV64B is a high-performance electrically erasable programmable read only
memory (EEPROM). Its 64K of memory is organized as 8,192 words by 8 bits. Manu-
factured with Atmel’s advanced nonvolatile CMOS technology, the device offers ac-
cess times to 200 ns with power dissipation of just 54 mW. When the device is dese-
lected, the CMOS standby current is less than 20
μ
A.
The AT28LV64B is accessed like a static RAM for the read or write cycle without the
need for external components. The device contains a 64-byte page register to allow
PDIP, SOIC
Top View
Pin Name
Function
A0 - A12
Addresses
CE
Chip Enable
OE
Output Enable
WE
Write Enable
I/O0 - I/O7
Data Inputs/Outputs
NC
No Connect
DC
Don’t Connect
Pin Configurations
TSOP
Top View
(continued)
Note: PLCC package pins 1 and
17 are DON’T CONNECT.
PLCC
Top View
0299C
AT28LV64B
2-135
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