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參數(shù)資料
| 型號(hào)： | AT27LV512A-90TI |
| 廠商： | ATMEL CORP |
| 元件分類： | DRAM |
| 英文描述： | High Speed CMOS Logic Quad Bilateral Switches 14-TSSOP -55 to 125 |
| 中文描述： | 64K X 8 OTPROM, 90 ns, PDSO28 |
| 封裝： | 8 X 13.40 MM, PLASTIC, MO-183, TSOP1-28 |
| 文件頁數(shù)： | 8/9頁 |
| 文件大?。?/td> | 220K |
| 代理商： | AT27LV512A-90TI |
Atmel’s 27LV512A Integrated
Product Identification Code
(1)
Codes
Pins
Hex
Data
A0
O7 O6 O5 O4 O3 O2 O1 O0
Manufacturer
Device Type
Note:
0
1
0
0
0
0
0
0
1
0
1
0
1
1
1
0
0
1
1E
0D
1. The AT27LV512A has the same Product Identification
Code as the AT27C512R. Both are programming
compatible.
Rapid
Programming Algorithm
A 100
μ
s CE pulse width is used to program. The address
is set to the first location. V
CC
is raised to 6.5V and
OE/V
PP
is raised to 13.0V. Each address is first pro-
grammed with one 100
μ
s CE pulse without verification.
Then a verification / reprogramming loop is executed for
each address. In the event a byte fails to pass verification,
up to 10 successive 100
μ
s pulses are applied with a veri-
fication after each pulse. If the byte fails to verify after 10
pulses have been applied, the part is considered failed.
After the byte verifies properly, the next address is se-
lected until all have been checked. OE/V
PP
is then low-
ered to V
IL
and V
CC
to 5.0V. All bytes are read again and
compared with the original data to determine if the device
passes or fails.
AC Programming Characteristics
T
A
= 25
±
5°C, V
CC
= 6.5
±
0.25V, OE/V
PP
= 13.0
±
0.25V
Sym-
bol
Parameter
Test
Conditions*
(1)
Limits
Min
Units
Max
t
AS
t
OES
t
OEH
t
DS
t
AH
t
DH
Address Setup Time
2
μ
s
OE/V
PP
Setup Time
2
μ
s
OE/V
PP
Hold Time
2
μ
s
Data Setup Time
2
μ
s
Address Hold Time
0
μ
s
Data Hold Time
CE High to
Output Float Delay
(2)
V
CC
Setup Time
CE Program Pulse Width
(3)
Data Valid from CE
(2)
2
μ
s
t
DFP
0
130
ns
t
VCS
t
PW
t
DV
t
VR
2
μ
s
95
105
μ
s
1
μ
s
OE/V
PP
Recovery Time
OE/V
PP
Pulse Rise
Time During Programming
2
μ
s
t
PRT
50
ns
*AC Conditions of Test:
Input Rise and Fall Times (10% to 90%).............20 ns
Input Pulse Levels..................................0.45V to 2.4V
Input Timing Reference Level.................0.8V to 2.0V
Output Timing Reference Level..............0.8V to 2.0V
Notes: 1. V
CC
must be applied simultaneously or before
OE/V
PP
and removed simultaneously or after
OE/V
PP
.
2. This parameter is only sampled and is not 100%
tested. Output Float is defined as the point where
data is no longer driven —see timing diagram.
3. Program Pulse width tolerance is 100
μ
sec
±
5%.
3-92
AT27LV512A
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PDF描述 |
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| AT27LV512A-90 | 512K 64K x 8 Low Voltage OTP CMOS EPROM |
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| AT27LV520-90SC | 512K 64K x 8 Multiplexed Addresses/ Outputs Low Voltage OTP EPROM |
| AT27LV520-90SI | 512K 64K x 8 Multiplexed Addresses/ Outputs Low Voltage OTP EPROM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT27LV512A-90TU | 功能描述:可擦除可編程ROM 512Kb (64Kx8) OTP 3V 90ns RoHS:否 制造商:Maxim Integrated 類型: 存儲(chǔ)容量:1024 bit 組織:1 K x 1 接口類型: 工作電流:5 uA 編程電壓: 工作電源電壓:2.8 V to 6 V 最大工作溫度:+ 85 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-92 |
| AT27LV512R-20JI | 制造商:Atmel Corporation 功能描述:EPROM OTP 512KBIT 64KX8 200NS 32PLCC - Rail/Tube |
| AT27LV520-70SC | 功能描述:IC OTP 512KBIT 70NS 20SOIC RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:32 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類型:FLASH 存儲(chǔ)容量:1M (128K x 8) 速度:120ns 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:32-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:32-PLCC 包裝:管件 其它名稱:AT49BV00112JC |
| AT27LV520-70XC | 功能描述:IC OTP 512KBIT 70NS 20TSSOP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:32 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類型:FLASH 存儲(chǔ)容量:1M (128K x 8) 速度:120ns 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:32-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:32-PLCC 包裝:管件 其它名稱:AT49BV00112JC |
| AT27LV520-70XI | 功能描述:可擦除可編程ROM 512Kb (64Kx8) OTP 3V 70ns RoHS:否 制造商:Maxim Integrated 類型: 存儲(chǔ)容量:1024 bit 組織:1 K x 1 接口類型: 工作電流:5 uA 編程電壓: 工作電源電壓:2.8 V to 6 V 最大工作溫度:+ 85 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-92 |
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