參數(shù)資料
型號(hào): AT27C2048-15PI
廠商: ATMEL CORP
元件分類: DRAM
英文描述: 2-Megabit 128K x 16 OTP EPROM
中文描述: 128K X 16 OTPROM, 150 ns, PDIP40
封裝: 0.600 INCH, PLASTIC, MS-011AC, DIP-40
文件頁數(shù): 1/9頁
文件大?。?/td> 163K
代理商: AT27C2048-15PI
AT27C2048
1
Features
Fast Read Access Time - 55 ns
Low Power CMOS Operation
– 100
μ
A Maximum Standby
– 35 mA Maximum Active at 5 MHz
JEDEC Standard Packages
– 40-Lead 600 mil PDIP
– 44-Lead PLCC
– 40-Lead TSOP (10 mm X 14 mm)
Direct Upgrade from 512K bit and 1M bit
(AT27C516 and AT27C1024) EPROMs
5V
±
10% Power Supply
High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
Rapid
Programming Algorithm - 50
μ
s/word (typical)
CMOS and TTL Compatible Inputs and Outputs
Integrated Product Identification Code
Commercial and Industrial Temperature Ranges
Description
The AT27C2048 is a low-power, high performance 2,097,152-bit one-time program-
mable read only memory (OTP EPROM) organized 128K by 16 bits. It requires a sin-
gle 5V power supply in normal read mode operation. Any word can be accessed in
less than 55 ns, eliminating the need for speed-reducing WAIT states. The by-16
organization makes this part ideal for high-performance 16 and 32 bit microprocessor
systems.
TSOP Top View
Type 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
A9
A10
A11
A12
A13
A14
A15
A16
PGM
VCC
VPP
CE
O15
O14
O13
O12
O11
O10
O9
O8
GND
A8
A7
A6
A5
A4
A3
A2
A1
A0
OE
O0
O1
O2
O3
O4
O5
O6
O7
GND
PDIP Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VPP
CE
O15
O14
O13
O12
O11
O10
O9
O8
GND
O7
O6
O5
O4
O3
O2
O1
O0
OE
VCC
PGM
A16
A15
A14
A13
A12
A11
A10
A9
GND
A8
A7
A6
A5
A4
A3
A2
A1
A0
PLCC Top View
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
O12
O11
O10
O9
O8
GND
NC
O7
O6
O5
O4
A13
A12
A11
A10
A9
GND
NC
A8
A7
A6
A5
6
5
4
3
2
1
4
4
4
4
4
1
1
2
2
2
2
2
2
2
2
2
O
O
O
O
O
D
A
A
A
A
A
O
O
O
C
V
D
V
P
A
A
A
2-Megabit
(128K x 16)
OTP EPROM
AT27C2048
0632B-A–06/97
Pin Configurations
Note:
Both GND pins must be con-
nected.
Pin Name
Function
A0 - A16
Addresses
O0 - O15
Outputs
CE
Chip Enable
OE
Output Enable
PGM
Program
NC
No Connect
Note:
PLCC package pins 1 and 23
are DON’T CONNECT.
(continued)
相關(guān)PDF資料
PDF描述
AT27C2048-15VC 12-Bit Asynchronous Binary Counter 16-SOIC -40 to 85
AT27C2048-15VI 12-Bit Asynchronous Binary Counter 16-SOIC -40 to 85
AT27C2048-55 12-Bit Asynchronous Binary Counter 16-SOIC -40 to 85
AT27C2048-55JC 12-Bit Asynchronous Binary Counter 16-PDIP -40 to 85
AT27C2048-55JI 12-Bit Asynchronous Binary Counter 16-PDIP -40 to 85
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