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參數(shù)資料
| 型號(hào)： | AT25HP512C1-10CC-2.7 |
| 廠商： | ATMEL CORP |
| 元件分類(lèi)： | DRAM |
| 英文描述： | SPI Serial EEPROMs |
| 中文描述： | 64K X 8 SPI BUS SERIAL EEPROM, DSO8 |
| 封裝： | 0.300 INCH, LAP-8 |
| 文件頁(yè)數(shù)： | 7/15頁(yè) |
| 文件大?。?/td> | 178K |
| 代理商： | AT25HP512C1-10CC-2.7 |
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AT25HP256/512
7
Functional Description
The AT25HP256/512 is designed to interface directly with
the synchronous serial peripheral interface (SPI) of the
6800 type series of microcontrollers.
The AT25HP256/512 utilizes an 8-bit instruction register.
The list of instructions and their operation codes are con-
tained in Table 1. All instructions, addresses, and data are
transferred with the MSB first and start with a high-to-low
CS transition.
Table 1.
Instruction Set for the AT25HP256/512
WRITE ENABLE (WREN):
The device will power up in the
write disable state when V
CC
is applied. All programming
instructions must therefore be preceded by a Write Enable
instruction.
WRITE DISABLE (WRDI):
To protect the device against
inadvertent writes, the Write Disable instruction disables all
programming modes. The WRDI instruction is independent
of the status of the WP pin.
READ STATUS REGISTER (RDSR):
The Read Status
Register instruction provides access to the status register.
The READY/BUSY and Write Enable status of the device
can be determined by the RDSR instruction. Similarly, the
Block Write Protection bits indicate the extent of protection
employed. These bits are set by using the WRSR instruc-
tion.
Table 2.
Status Register Format
WRITE STATUS REGISTER (WRSR):
The WRSR instruc-
tion allows the user to select one of four levels of protec-
tion. The AT25HP256/512 is divided into four array
segments. Top quarter (1/4), top half (1/2), or all of the
memory segments can be protected. Any of the data within
any selected segment will therefore be READ only. The
block write protection levels and corresponding status reg-
ister control bits are shown in Table 4.
The three bits, BP0, BP1, and WPEN are nonvolatile cells
that have the same properties and functions as the regular
memory cells (e.g. WREN, t
WC
, RDSR).
Table 4.
Block Write Protect Bits
The WRSR instruction also allows the user to enable or
disable the write protect (WP) pin through the use of the
Write Protect Enable (WPEN) bit. Hardware write protec-
tion is enabled when the WP pin is low and the WPEN bit is
“1”. Hardware write protection is disabled when eitherthe
WP pin is high or the WPEN bit is “0.” When the device is
hardware write protected, writes to the Status Register,
including the Block Protect bits and the WPEN bit, and the
block-protected sections in the memory array are disabled.
Instruction
Name
Instruction
Format
Operation
WREN
0000 X110
Set Write Enable Latch
WRDI
0000 X100
Reset Write Enable Latch
RDSR
0000 X101
Read Status Register
WRSR
0000 X001
Write Status Register
READ
0000 X011
Read Data from Memory Array
WRITE
0000 X010
Write Data to Memory Array
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
WPEN
X
X
X
BP1
BP0
WEN
RDY
Table 3.
Read Status Register Bit Definition
Bit
Definition
Bit 0 (RDY)
Bit 0 = 0 (RDY) indicates the device is
READY. Bit 0 = 1 indicates the write cycle is in
progress.
Bit 1 (WEN)
Bit 1= 0 indicates the device is notWRITE
ENABLED. Bit 1 = 1 indicates the device is
WRITE ENABLED.
Bit 2 (BP0)
See Table 4.
Bit 3 (BP1)
See Table 4.
Bits 4-6 are 0s when device is not in an internal write cycle.
Bit 7 (WPEN)
See Table 5.
Bits 0-7 are 1s during an internal write cycle.
Level
Status Register Bits
Array Addresses Protected
BP1
BP0
AT25HP256/512
0
0
0
None
1(1/4)
0
1
6000 - 7FFF/C000 - FFFF
2(1/2)
1
0
4000 - 7FFF/8000 - FFFF
3(All)
1
1
0000 - 7FFF/0000 - FFFF
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AT25HP256-10CI-1.8 | SPI Serial EEPROMs |
| AT25HP256C1-10CI-1.8 | SPI Serial EEPROMs |
| AT25HP512C1-10CI-1.8 | SPI Serial EEPROMs |
| AT25HP256-10CI-2.7 | SPI Serial EEPROMs |
| AT25HP256C1-10CI-2.7 | SPI Serial EEPROMs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT25HP512C1-10CI | 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:SPI Serial EEPROMs |
| AT25HP512C1-10CI-1.8 | 功能描述:IC EEPROM 512KBIT 10MHZ 8LAP RoHS:否 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:378 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類(lèi)型:FLASH 存儲(chǔ)容量:8M（1M x 8，512K x 16） 速度:110ns 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-CBGA 供應(yīng)商設(shè)備封裝:48-CBGA（7x7） 包裝:托盤(pán) |
| AT25HP512C1-10CI-2.7 | 功能描述:IC EEPROM 512KBIT 10MHZ 8LAP RoHS:否 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:378 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類(lèi)型:FLASH 存儲(chǔ)容量:8M（1M x 8，512K x 16） 速度:110ns 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-CBGA 供應(yīng)商設(shè)備封裝:48-CBGA（7x7） 包裝:托盤(pán) |
| AT25HP512C1-10CU-1.8 | 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:SPI Serial EEPROMs |
| AT25HP512C110CU2.7 | 制造商:Atmel Corporation 功能描述:EEPROM Serial-SPI 512K-bit 64K x 8 3.3V/5V 8-Pin LAP |
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