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參數(shù)資料
| 型號： | AT25F1024AY4-10YU-2.7 |
| 廠商： | ATMEL CORP |
| 元件分類： | DRAM |
| 英文描述： | SPI Serial Memory |
| 中文描述： | 128K X 8 SPI BUS SERIAL EEPROM, DSO8 |
| 封裝： | 6 X 4.90 MM, LEAD AND HALOGEN FREE, SAP-8 |
| 文件頁數(shù)： | 8/18頁 |
| 文件大?。?/td> | 299K |
| 代理商： | AT25F1024AY4-10YU-2.7 |
8
3346C–SEEPR–7/04
READ PRODUCT ID (RDID):
The RDID instruction allows the user to read the manufac-
turer and product ID of the device. The first byte after the instruction will be the
manufacturer code (1FH = ATMEL), followed by the device code, 60H.
WRITE STATUS REGISTER (WRSR):
The WRSR instruction allows the user to select
one of four levels of protection for the AT25F1024A. The AT25F1024A is divided into
four sectors where the top quarter (1/4), top half (1/2), or all of the memory sectors can
be protected (locked out) from write. Any of the locked-out sectors will therefore be
READ only. The locked-out sector and the corresponding status register control bits are
shown in Table 4.
The three bits, BP0, BP1, and WPEN, are nonvolatile cells that have the same proper-
ties and functions as the regular memory cells (e.g., WREN, t
WC
, RDSR).
Table 3.
Read Status Register Bit Definition
Bit
Definition
Bit 0 (RDY)
Bit 0 = 0 (RDY) indicates the device is READY. Bit 0 = 1 indicates the
write cycle is in progress.
Bit 1 (WEN)
Bit 1 = 0 indicates the device is notWRITE ENABLED. Bit 1 = 1 indicates
the device is WRITE ENABLED.
Bit 2 (BP0)
See Table 4.
Bit 3 (BP1)
See Table 4.
Bits 4-6 are 0s when device is not in an internal write cycle.
Bit 7 (WPEN)
See Table 5.
Bits 0-7 are 1s during an internal write cycle.
Block Write Protect Bits
Level
Status Register Bits
AT25F1024A
BP1
BP0
Array Addresses
Locked Out
Locked-out
Sector(s)
0
0
0
None
None
1(1/4)
0
1
018000 - 01FFFF
Sector 4
2(1/2)
1
0
010000 - 01FFFF
Sector 3, 4
3(All)
1
1
000000 - 01FFFF
All sectors
(1 - 4)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AT25F1024A | High Speed CMOS Logic Hex Buffers/Line Drivers with Inverting 3-State Outputs 16-PDIP -55 to 125 |
| AT25F1024 | High Speed CMOS Logic Hex Buffers/Line Drivers with Non-Inverting 3-State Outputs 16-SOIC -55 to 125 |
| AT25F512 | SPI Serial Memory |
| AT25F512N-10SI-2.7 | SPI Serial Memory |
| AT25F1024N-10SI-2.7 | High Speed CMOS Logic Hex Buffers/Line Drivers with Inverting 3-State Outputs 16-PDIP -55 to 125 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT25F1024C1-10CC-2.7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SPI Serial EEPROM |
| AT25F1024C1-10CI-2.7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SPI Serial EEPROM |
| AT25F1024N-10SI-2.7 | 制造商:Atmel Corporation 功能描述:Flash Serial-SPI 3V/3.3V 1Mbit 128K x 8bit 20ns 8-Pin SOIC |
| AT25F1024N-10SU-2.7 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:SPI Serial Memory |
| AT25F1024Y4-10YU-2.7 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:SPI Serial Memory |
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