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參數(shù)資料
| 型號： | AT25640A-10TI-1.8 |
| 廠商： | ATMEL CORP |
| 元件分類： | DRAM |
| 英文描述： | High Speed CMOS Logic Quad 2-Input OR Gates 14-PDIP -55 to 125 |
| 中文描述： | 8K X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 4.40 MM, PLASTIC, MO-153AA, TSSOP-8 |
| 文件頁數(shù)： | 7/20頁 |
| 文件大?。?/td> | 388K |
| 代理商： | AT25640A-10TI-1.8 |
7
AT25080A/160A/320A/640A
5082B–SEEPR–1/05
Functional
Description
The AT25080A/160A/320A/640A is designed to interface directly with the synchronous
serial peripheral interface (SPI) of the 6805 and 68HC11 series of microcontrollers.
The AT25080A/160A/320A/640A utilizes an 8-bit instruction register. The list of instruc-
tions and their operation codes are contained in Table 5. All instructions, addresses, and
data are transferred with the MSB first and start with a high-to-low CS transition.
WRITE ENABLE (WREN):
The device will power up in the write disable state when V
CC
is applied. All programming instructions must therefore be preceded by a Write Enable
instruction.
WRITE DISABLE (WRDI):
To protect the device against inadvertent writes, the Write
Disable instruction disables all programming modes. The WRDI instruction is indepen-
dent of the status of the WP pin.
READ STATUS REGISTER (RDSR):
The Read Status Register instruction provides
access to the status register. The READY/BUSY and Write Enable status of the device
can be determined by the RDSR instruction. Similarly, the block write protection bits
indicate the extent of protection employed. These bits are set by using the WRSR
instruction.
Table 5.
Instruction Set for the AT25080A/160A/320A/640A
Instruction Name
Instruction Format
Operation
WREN
0000 X110
Set Write Enable Latch
WRDI
0000 X100
Reset Write Enable Latch
RDSR
0000 X101
Read Status Register
WRSR
0000 X001
Write Status Register
READ
0000 X011
Read Data from Memory Array
WRITE
0000 X010
Write Data to Memory Array
Table 6.
Status Register Format
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
WPEN
X
X
X
BP1
BP0
WEN
RDY
Table 7.
Read Status Register Bit Definition
Bit
Definition
Bit 0 (RDY)
Bit 0 = “0” (RDY) indicates the device is ready. Bit 0 = “1” indicates the write
cycle is in progress.
Bit 1 (WEN)
Bit 1= “0” indicates the device is not write-enabled. Bit 1 = “1” indicates the
device is write-enabled.
Bit 2 (BP0)
See Table 8 on page 8.
Bit 3 (BP1)
See Table 8 on page 8.
Bits 4
6 are “0”s when device is not in an internal write cycle.
Bit 7 (WPEN)
See Table 9 on page 8.
Bits 0
7 are “1”s during an internal write cycle.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AT25640A-10TI-2.7 | High Speed CMOS Logic Quad 2-Input OR Gates 14-PDIP -55 to 125 |
| AT25640A-10TU-2.7 | High Speed CMOS Logic Quad 2-Input OR Gates 14-SOIC -55 to 125 |
| AT25320A | SPI Serial EEPROMs |
| AT25320A-10PI-1.8 | High Speed CMOS Logic 8-Input Multiplexer with 3-State Outputs 16-SOIC -55 to 125 |
| AT25320A-10PI-2.7 | SPI Serial EEPROMs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT25640A-10TI-2.7 | 功能描述:IC EEPROM 64KBIT 20MHZ 8TSSOP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:96 系列:- 格式 - 存儲器:閃存 存儲器類型:FLASH 存儲容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并聯(lián) 電源電壓:2.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP 包裝:托盤 |
| AT25640A-10TI-2.7 SL383 | 制造商:Atmel Corporation 功能描述:EEPROM Serial-SPI 64K-bit 8K x 8 3.3V/5V 8-Pin TSSOP T/R |
| AT25640A-10TQ-2.7 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:SPI Serial EEPROMs |
| AT25640A-10TU-1.8 | 功能描述:電可擦除可編程只讀存儲器 64K SPI 1M CYCLES- 10MS IND TEMP 1.8V RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| AT25640A-10TU-2.7 | 功能描述:電可擦除可編程只讀存儲器 64K SPI 1M CYCLES- 10MS IND TEMP 2.7V RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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