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參數(shù)資料
| 型號(hào)： | AT25640 |
| 廠商： | Atmel Corp. |
| 英文描述： | High Speed CMOS Logic 8-Input NAND Gate 14-TSSOP -55 to 125 |
| 中文描述： | SPI串行EEPROM |
| 文件頁(yè)數(shù)： | 8/16頁(yè) |
| 文件大?。?/td> | 172K |
| 代理商： | AT25640 |
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AT25080/160/320/640
8
Writes are only allowed to sections of the memory which
are not block-protected.
NOTE:
When the WPEN bit is hardware write protected, it
cannot be changed back to “0”, as long as the WP pin is
held low.
READ
AT25080/160/320/640 via the SO (Serial Output) pin
requires the following sequence. After the CS line is pulled
low to select a device, the READ op-code is transmitted via
the SI line followed by the byte address to be read (A15-A0,
Refer to Table 6). Upon completion, any data on the SI line
will be ignored. The data (D7-D0) at the specified address
is then shifted out onto the SO line. If only one byte is to be
read, the CS line should be driven high after the data
comes out. The READ sequence can be continued since
the byte address is automatically incremented and data will
continue to be shifted out. When the highest address is
reached, the address counter will roll over to the lowest
address allowing the entire memory to be read in one con-
tinuous READ cycle.
WRITE SEQUENCE (WRITE):
In order to program the
AT25080/160/320/640, two separate instructions must be
executed. First, the device
must be write enabled
via the
Write Enable (WREN) Instruction. Then a Write (WRITE)
Instruction may be executed. Also, the address of the
SEQUENCE
(READ):
Reading
the
memory location(s) to be programmed must be outside the
protected address field location selected by the Block Write
Protection Level. During an internal write cycle, all com-
mands will be ignored except the RDSR instruction.
A Write Instruction requires the following sequence. After
the CS line is pulled low to select the device, the WRITE
op-code is transmitted via the SI line followed by the byte
address (A15-A0) and the data (D7-D0) to be programmed
(Refer to Table 6). Programming will start after the CS pin
is brought high. (The LOW to High transition of the CS pin
must occur during the SCK low time immediately after
clocking in the D0 (LSB) data bit.
The READY/BUSY status of the device can be determined
by initiating a READ STATUS REGISTER (RDSR) Instruc-
tion. If Bit 0 = 1, the WRITE cycle is still in progress. If Bit 0
= 0, the WRITE cycle has ended. Only the READ STATUS
REGISTER instruction is enabled during the WRITE pro-
gramming cycle.
The AT25080/160/320/640 is capable of a 32-byte PAGE
WRITE operation. After each byte of data is received, the
five low order address bits are internally incremented by
one; the high order bits of the address will remain constant.
If more than 32-bytes of data are transmitted, the address
counter will roll over and the previously written data will be
overwritten. The AT25080/160/320/640 is automatically
returned to the write disable state at the completion of a
WRITE cycle.
NOTE:
If the device is not Write enabled (WREN), the
device will ignore the Write instruction and will return to the
standby state, when CS is brought high. A new CS falling
edge is required to re-initiate the serial communication.
Table 5.
WPEN Operation
WPEN
WP
WEN
Protected
Blocks
Unprotected
Blocks
Status
Register
0
X
0
Protected
Protected
Protected
0
X
1
Protected
Writable
Writable
1
Low
0
Protected
Protected
Protected
1
Low
1
Protected
Writable
Protected
X
High
0
Protected
Protected
Protected
X
High
1
Protected
Writable
Writable
Table 6.
Address Key
Address
AT25080
AT25160
AT25320
AT25640
A
N
A
9
- A
0
A
10
- A
0
A
11
- A
0
A
12
- A
0
Don't
Care Bits
A
15
- A
10
A
15
- A
11
A
15
- A
12
A
15
- A
13
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AT25640-10PC | SPI Serial EEPROMs |
| AT25640-10PC-1.8 | SPI Serial EEPROMs |
| AT25640-10PC-2.7 | High Speed CMOS Logic 8-Input NAND Gate 14-TSSOP -55 to 125 |
| AT25640-10PI | SPI Serial EEPROMs |
| AT25640-10PI-2.7 | SPI Serial EEPROMs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT25640-10PA-2.7C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SERIAL EEPROM|8KX8|CMOS|DIP|8PIN|PLASTIC |
| AT25640-10PA-5.0C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SERIAL EEPROM|8KX8|CMOS|DIP|8PIN|PLASTIC |
| AT25640-10PC | 功能描述:電可擦除可編程只讀存儲(chǔ)器 64K (8Kx8) 5V RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| AT25640-10PC-1.8 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:SPI Serial EEPROMs |
| AT25640-10PC-2.7 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:SPI Serial EEPROMs |
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