參數(shù)資料
型號: AT25080A-10TU-2.7
廠商: ATMEL CORP
元件分類: PROM
英文描述: SPI Serial EEPROMs
中文描述: 1K X 8 SPI BUS SERIAL EEPROM, PDSO8
封裝: 4.40 MM, GREEN, PLASTIC, MO-153AA, TSSOP-8
文件頁數(shù): 2/26頁
文件大?。?/td> 801K
代理商: AT25080A-10TU-2.7
10
3347L–SEEPR–06/07
AT25080A/160A/320A/640A
WRITE STATUS REGISTER (WRSR): The WRSR instruction allows the user to select one of
four levels of protection. The AT25080A/160A/320A/640A is divided into four array segments.
One-quarter, one-half, or all of the memory segments can be protected. Any of the data within
any selected segment will therefore be read only. The block write protection levels and corre-
sponding status register control bits are shown in Table 3-4.
The three bits BP0, BP1, and WPEN are nonvolatile cells that have the same properties and
functions as the regular memory cells (e.g., WREN, tWC, RDSR).
The WRSR instruction also allows the user to enable or disable the write protect (WP) pin
through the use of the Write Protect Enable (WPEN) bit. Hardware write protection is enabled
when the WP pin is low and the WPEN bit is “1”. Hardware write protection is disabled when
either the WP pin is high or the WPEN bit is “0”. When the device is hardware write protected,
writes to the status register, including the block protect bits and the WPEN bit, and the block-pro-
tected sections in the memory array are disabled. Writes are only allowed to sections of the
memory that are not block-protected.
NOTE: When the WPEN bit is hardware write protected, it cannot be changed back to “0” as
long as the WP pin is held low.
Table 3-3.
Read Status Register Bit Definition
Bit
Definition
Bit 0 (RDY)
Bit 0 = “0” (RDY) indicates the device is READY. Bit 0 = “1” indicates the write
cycle is in progress.
Bit 1 (WEN)
Bit 1= “0” indicates the device is not WRITE ENABLED. Bit 1 = “1” indicates the
device is write enabled.
Bit 2 (BP0)
See
Bit 3 (BP1)
See
Bits 4–6 are “0”s when device is not in an internal write cycle.
Bit 7 (WPEN)
See
Bits 0–7 are “1”s during an internal write cycle.
Table 3-4.
Block Write Protect Bits
Level
Status
Register Bits
Array Addresses Protected
BP1
BP0
AT25080A
AT25160A
AT25320A
AT25640A
0
None
1(1/4)
0
1
0300
03FF
0600
07FF
0C00
0FFF
1800
1FFF
2(1/2)
1
0
0200
03FF
0400
07FF
0800
0FFF
1000
1FFF
3(All)
1
0000
03FF
0000
07FF
0000
0FFF
0000
1FFF
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